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Featured researches published by Jin He.


IEEE Transactions on Electron Devices | 2008

Generic Carrier-Based Core Model for Undoped Four-Terminal Double-Gate MOSFETs Valid for Symmetric, Asymmetric, and Independent-Gate-Operation Modes

Feng Liu; Jin He; Yue Fu; Jinhua Hu; Wei Bian; Yan Song; Xing Zhang; Mansun Chan

A generic carrier-based core model for undoped four-terminal double-gate (DG) MOSFETs has been developed and is presented in this paper. The model is valid for symmetric, asymmetric, and independent-gate-operation modes. Based on the exact solution of the 1-D Poissons equation in a general DG MOSFET configuration, a rigorous derivation of the drain-current equations from the Pao-Sahs double integral has been performed. By using the channel carriers as the intermediate variable, a very compact analytical drain-current expression can be obtained. The model is extensively verified by comparisons with a 2-D numerical simulator under a large number of biasing conditions. The concise mathematical formulation allows the unification of various DG models into a carrier-based core model for a compact DG MOSFET model development.


IEEE Transactions on Electron Devices | 2008

A Non-Charge-Sheet Analytic Model for Symmetric Double-Gate MOSFETs With Smooth Transition Between Partially and Fully Depleted Operation Modes

Feng Liu; Jin He; Jian Zhang; Yu Chen; Mansun Chan

A non-charge-sheet analytic model for long-channel symmetric double-gate (DG) MOSFETs with smooth transition between partially and fully depleted (PD and FD) operation modes is presented in this paper. The 1-D Poissons equation with the mobile and dopant charge terms is first solved to obtain the continuous channel potential in the symmetric DG structure physically. A non-charge-sheet analytic drain-current expression is then derived from Pao-Sahs dual integral as a function of the channel potentials at the source and drain terminals. The comparison between the analytical calculation and 2-D numerical simulation demonstrates that the developed model is not only valid for a wide range of doping concentrations and geometry sizes, but also able to capture the DG MOSFET specific characteristics such as the volume inversion and smooth transition between PD and FD operation modes. The presented model leads to a more clear understanding of DG MOSFET device physics, providing a physics-based DG MOSET compact modeling framework for circuit simulation.


IEEE Transactions on Electron Devices | 2007

A Carrier-Based Approach for Compact Modeling of the Long-Channel Undoped Symmetric Double-Gate MOSFETs

Jin He; Feng Liu; Jian Zhang; Jie Feng; Jinhua Hu; Shengqi Yang; Mansun Chan

This paper presents a carrier-based approach to develop a compact model for long-channel undoped symmetric double-gate MOSFETs. The formulation starts from a solution of the Poissons equation that is coupled to the Pao-Sah current formulation to obtain an analytic drain-current model in terms of the carrier concentration. The model provides an analytical expression to describe the dependence of the surface potential, silicon-film centric potential, inversion charge, and the current on the silicon-body thickness and the gate-oxide thickness. The model calculation is verified by comparing results to the 2D numerical simulations, and good agreement is observed


international conference on solid state and integrated circuits technology | 2004

BSIM5 MOSFET Model

Xuemei Jane Xi; Jin He; Mohan Dunga; Hui Wan; Mansun Chan; Chung-Hsun Lin; Babak Heydari; Ali M. Niknejad; Chenming Hu

This paper summarizes BSIM5 MOSFET model for aggressively scaled CMOS technology which was released recently. Various new physical effects are timely addressed in the new physical core including more accurate physics that is easily extended to non-charge-sheet, completely continuous current and derivatives, and extendibility to non-traditional CMOS based devices including SOI and double-gate MOSFETs. The flexible architecture also enables the carry-over of BSFM4s accurate modeling of numerous device behaviors attributable to device physics or technologies.


international symposium on signals circuits and systems | 2004

A non-charge-sheet based analytical model of undoped symmetric double-gate MOSFETs using SPP approach

Jin He; X. Xuemei; Mansun Chan; Chung-Hsun Lin; Ali M. Niknejad; Chenming Hu

A non-charge-sheet based analytical model of undoped symmetric double-gate MOSFETs is developed in this paper using the SPP (surface potential plus) approach. The essential difference of the present theory compared with the previous lies in that the Poisson equation is solved in the term of the electron concentration rather than the term of the surface potential. This solution formulates the electrical field surface potential in inversion charge terms rather than the surface potential. Thus, a non-charge-sheet-based analytical solution of inversion charge is obtained directly, replacing the solution of transcendent equation groups of the surface potential. The obtained inversion charge relation then serves to develop a non-charge-sheet-based analytical theory for undoped symmetric double-gate MOSFETs from the Pao-Sah current formulation. The formulated model has an analytic form that does not need to solve for the transcendent equation as in the conventional surface potentials or Pao-Sah formulation. The validity of the model has also been demonstrated by extensive comparison with AMD double-gate MOSFET data.


Semiconductor Science and Technology | 2002

Linearly graded doping drift region: a novel lateral voltage-sustaining layer used for improvement of RESURF LDMOS transistor performances

Jin He; Xuemei Xi; Mansun Chan; Chenming Hu; Yingxue Li; Zhang Xing; Ru Huang

A linearly graded doping drift region structure, a novel lateral voltage-sustained layer used for improvement of reduced surface field (RESURF) LDMOS transistor performance has been evaluated theoretically, numerically and experimentally in this paper for the first time. Due to the coupling effect of the two-dimensional (2D) electrical field, it is found from the theory developed here that the linearly graded drift region-doped profile can provide a high breakdown voltage while maintaining a high doping dose in the total drift region for minimizing the on-resistance Ron. The characteristics of such an LDMOS have been demonstrated by the 2D semiconductor device simulator MEDICI and further verified by our experimental results. We have obtained a reduction of the on-resistance of 50% from 10.3 mΩ cm2 to 5 mΩ cm2 in the on-state, and an increase of the breakdown voltage by a factor of 2.5 from 90 V to 234 V in the off-state, compared to the values for conventional RESURF devices. The experimental results verify the performance improvement predicted by the simulation and theory.


Semiconductor Science and Technology | 2007

An approximate carrier-based compact model for fully depleted surrounding-gate MOSFETs with a finite doping body

Jin He; Feng Liu; Wei Bian; Jie Feng; Jian Zhang; Xing Zhang

An approximate carrier-based compact model for surrounding-gate MOSFETs with a finite doping body is developed in this paper. Starting from Poissons equation, the dopant effect is considered approximately by a superposition principle. The analytic surface potential is compared with 3D device simulation and the error is also demonstrated for different body doping. An analytic current?voltage model is derived from the Pao?Sah current equation under the gradual channel approximation and model predictions are verified by the 3D simulation results of the fully depleted SRG MOSFET devices for finite body doping concentration up to 1017 cm?3 with accepted error less 10%.


IEEE Transactions on Electron Devices | 2011

Uniaxial Strain Effects on Electron Ballistic Transport in Gate-All-Around Silicon Nanowire MOSFETs

Lining Zhang; Haijun Lou; Jin He; Mansun Chan

Uniaxial strain effects on electron ballistic transport in extremely scaled gate-all-around nanowire MOSFETs with both [100] and [110] orientations are investigated in this paper. Band structures of nanowires without and with strain are calculated using the empirical sp3d5s* tight-binding model. The top-of-the-barrier model is utilized to simulate the electron ballistic transport. It is found that uniaxial [110] strain reduces the electron transport mass, but its effect gradually decreases and becomes insignificant when the dimension of the nanowire is scaled. In addition to existing band splitting caused by quantum confinement, [100] and [110] tensile strains induce further band splitting. Hence, the impact of the strain effects depends on whether the nanowire operates in the nondegenerated or degenerated mode. Simulation results show that uniaxial strain effects are more significant in [110] nanowires. The impact of surface orientation can still be observed even in deeply scaled nanowires.


international symposium on quality electronic design | 2005

Charge-based core and the model architecture of BSIM5

Jin He; Jane Xi; Mansun Chan; Hui Wan; Mohan Dunga; Babak Heydari; Ali M. Niknejad; Chenming Hu

The paper outlines the charge-based core and the architecture of the BSIM5 MOSFET model for sub-100 nm CMOS circuit simulation. The BSIM5 model is a continuous, completely symmetric and accurate non charge-sheet based MOS transistor model derived from the basic device physics, including various physics effects. Comparison of the inversion charge between the BSIM5 prediction and self-consistent numerical solution shows good agreement. The demonstration of fully symmetric characteristics of BSIM5, such as channel current and its high-order derivative in the Gummel symmetry test, and charge and trans-capacitances in a SPICE simulation, also implies BSIM5 is the physically symmetric MOSFET model valid for RF-analog circuit simulations.


IEEE Transactions on Electron Devices | 2008

An Analytic Model for Nanowire MOSFETs With Ge/Si Core/Shell Structure

Lining Zhang; Jin He; Jian Zhang; Feng Liu; Yue Fu; Yan Song; Xing Zhang

An analytic model for the nanowire MOSFETs (NWFETs) with Ge/Si core/shell structure is developed in this paper. The analytical expressions of electrostatic potential and charges of this device are derived from classical device physics under the gradual channel approximation. Then, a drift-diffusion (DD) mechanism-based drain current model is obtained and verified by comparisons with the numerical simulation results. By modifying the intrinsic carrier concentration under 2-D confinement, quantum-mechanical effect is also taken into account approximately, and then, a ballistic current model is developed to study the impact of quantum-mechanical effect on the device characteristics. The performances of Ge/Si core/shell NWFETs are analyzed, and significant characteristics are demonstrated, in detail, by the proposed model. The presented analytic model may provide a base for device scientists and circuit engineers to understand the device physics and further develop a compact model of the NWFETs with Ge/Si core/shell heterostructure for circuit design and simulation.

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Mansun Chan

Hong Kong University of Science and Technology

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Lining Zhang

Hong Kong University of Science and Technology

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Chenming Hu

University of California

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Xuemei Xi

University of California

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