Jinggang Lu

Effects of grain boundary on impurity gettering and oxygen precipitation in polycrystalline sheet silicon

The effects of grain boundaries (GB) in polycrystalline sheet silicon on impurity gettering and oxygen precipitation were investigated by electron beam induced current (EBIC), deep level transient spectroscopy (DLTS), micro-Fourier-transform infrared spectroscopy (FTIR), and preferential etching/Normaski optical microscopy techniques. Both as-grown and thermally processed wafers were studied. A correlation between GB density and transition metal concentration was quantitatively established by combining DLTS and EBIC studies. It was found that four deep levels arising from Fe–B, Fe–Al, Cr–B, and Fei were present in the as-grown sample, and their concentrations decrease with increasing GB density. GB gettering was further verified by the presence of an EBIC image contrast halo around the GB. Preferential etching also revealed a precipitate density of 2×107 cm−2 on the GB. After processing, a clearly defined oxygen precipitate denuded zone formed around the GB with the interstitial oxygen concentration [Oi] ...

Deep level transient spectroscopy and capacitance-voltage study of dislocations and associated defects in SiGe∕Si heterostructures

Three SiGe∕Si heterostructures with different Ge contents have been examined by deep level transient spectroscopy (DLTS) and capacitance-voltage techniques. DLTS revealed a broad band of traps from 80to250K in the as-grown samples. Arrhenius plots of a 25% SiGe sample revealed three trap levels at 0.28, 0.31, and 0.43eV above the valance band, respectively. By varying the reverse biases and comparing samples of different Ge contents, it was found that the trap levels shift toward the valance band with increasing Ge concentration. Capacitance-voltage data indicated that the acceptor trap levels in the SiGe graded layer dramatically decreased from 40×1013cm−3 in the as-grown sample to 4×1013cm−3 after annealing at over 800°C. Based on their charge states and thermal annealing behaviors, we suggest that majority of the grown-in acceptor levels are likely due to vacancy clusters generated by dislocation jog dragging, which can be readily annealed out, leaving only the dislocation related deep levels. The dens...

Capacitance transient and current-/capacitance-voltage study of direct silicon bonded (110)/(100) interface

This letter has developed a procedure for quantitatively evaluating the electrical levels at a (110)∕(100) interfacial grain boundary (GB) in p-type direct silicon bonded wafers by combining current-/capacitance-voltage (I-V,C-V) and capacitance transient techniques. It is found that GB states can be positively charged and induce a high potential barrier. The local distribution of charge density deduced from I-V∕C-V measurements shows that the state density is constant, ∼2×1012cm−2, in the energy range Ev+0.36–0.50eV. Meanwhile, capacitance transient technique reveals the states in the energy range Ev+0.33–0.43eV with capture cross sections of 10−17cm2, and the state density is consistent with the results by I-V∕C-V deconvolution.

Hydrogen passivation of deep energy levels at the interfacial grain boundary in (110)/(100) bonded silicon wafers

This letter evaluates the density of grain boundary (GB) states before and after hydrogenation by J-V, C-V, and capacitance transient methods using gold/direct silicon-bonded (DSB) (110) thin silicon top layer/(100) silicon substrate junctions. The GB potential energy barrier in thermal equilibrium was reduced by 70 meV from 0.46 eV (before hydrogenation) to 0.39 eV (after hydrogen treatment). Whereas the clean sample had a density of GB states of ∼6×1012 cm−2 eV−1 in the range of Ev+0.54–0.64 eV, hydrogenation reduced the density of GB states to ∼9×1011 cm−2 eV−1 in the range of Ev+0.56–0.61 eV, which is about a sevenfold reduction from that of the clean sample.

Impact of Cu contamination on the electrical properties of a direct silicon bonded (110)/(100) interfacial grain boundary

Cu contamination of a “model” grain boundary (GB) created by direct silicon bonding of (110)/(100) wafers has been investigated by monitoring the hole emission from GB states. It is found that the electronic states at the clean GB are localized, whereas following Cu contamination, they transform into bandlike states with much larger hole capture cross sections. Following an increase in Cu contamination at the GB by a quenching anneal, the density of GB states decreases, while the GB neutral level remains constant, essentially independent of contamination temperature. It is believed that the electrically active Cu-related states present at the GB are generated from the surfaces of localized Cu precipitates, whereas quench cooling from a higher contamination temperature produces a lower density of large precipitates which results in a reduced density of Cu-related GB states.

Capacitance transient study of the influence of iron contamination on the electrical characteristics of silicon grain boundaries

The influence of iron contamination on the electrical characteristics of an interfacial grain boundary created by bonding two (110)∕(100) silicon wafers was examined by a capacitance transient technique. Compared with the clean sample, iron contamination increases both the density of boundary states (by at least three times) and the zero-bias barrier height (by 70meV), while dramatically reducing by two orders of magnitude the electron/hole capture cross-section ratio. These results suggest that a larger barrier will be sustained at the iron contaminated boundary under low injection condition, thereby enabling more effective minority carrier collection and associated enhanced recombination activity.

Carrier capture cross sections of deep gap states at the interfacial grain boundary in a (110)/(100) bonded silicon wafer

This letter examines hole emission processes at a (110)∕(100) grain boundary in a hybrid orientation direct-silicon-bonded p-type Si wafer. The near surface boundary position permits easy control of the charge density at the grain boundary via an applied reverse bias and simultaneous monitoring of the hole emission rate by the leakage current. It was found that, for states below the middle bandgap, those close to the valance band edge have relatively smaller hole capture cross sections than those at higher energy position, and electron capture cross sections are at least two or three orders larger than the corresponding hole capture cross sections.

Impact of oxygen on carbon precipitation in polycrystalline ribbon silicon

This article reports experimental evidence for the effect of oxygen on carbon precipitation in polycrystalline ribbon silicon. Four sets of wafers subject to various heat treatments have been examined by infrared spectroscopy. It is found that carbon precipitation in an oxygen-containing wafer consists of two distinct steps, namely, an initial rapid oxygen–carbon coprecipitation in the very first hour annealing, followed by slow precipitation during subsequent prolonged annealing. A high oxygen content enhances carbon precipitation throughout the two steps. It is shown that the formation of interstitial carbon in the presence of excess silicon self-interstitials generated during oxygen precipitation plays an important role in increasing the carbon precipitation rate in the first hour annealing. Because of the absence of interstitial injection during the following slow precipitation process, the enhancement effect of oxygen can only arise from an increase in precipitation sites. It is proposed that the oxy...

Impact of structural defect density on gettering of transition metal impurities during phosphorus emitter diffusion in multi-crystalline silicon solar cell processing

AbstractThe impact of structural defect density on gettering of transition metal impurities during phosphorous emitter diffusion has been investigated using a pair of multi-crystalline silicon (mc-Si) wafers. Chromium (Cr) impurities incorporated during growth were identified by deep level transient spectroscopy (DLTS) and used to evaluate the gettering efficiency. The Cr impurity concentration in the low defect density region of mc-Si wafers was reduced from ~3.5 × 1013 cm−3 to ~1.7 × 1012 cm−3 after phosphorous diffusion gettering (PDG), while for the high defect density region, there is no appreciable variation in the Cr concentration which only changed from ~3.0 to ~2.2 × 1012 cm−3 following PDG. It was concluded that the gettering process is not effective for highly defective regions of mc-Si wafers due to the ineffective impurity release from structural defects during the PDG process.

Deep-level transient spectroscopy study on direct silicon bonded (1 1 0)/(1 0 0) interfacial grain boundary

In this paper, the electrical properties of direct silicon bonded (1 1 0)/(1 0 0) silicon interfacial grain boundary (GB) have been investigated by deep-level transient spectroscopy (DLTS) technique. The behavior of charge emission at the GB indicates that the GB states are localized. Since the hole capture unavoidably comes into the rate window to play an important role in the process of GB charge decay when the GB–DLTS signal reaches the maximum, the routine Arrhenius plot is not suitable to achieve the signature of the GB states. Then a double-pulse approach by subtracting the spectra, taken under different pulse voltages, has been applied to reveal the GB states in the energy range Ev + 0.34–0.42 eV with the hole capture cross-sections of 10−17–10−16 cm2. The obtained energy levels are close to the quasi-Fermi levels determined at the corresponding pulse voltages by current–voltage (I–V) measurements. These GB states are believed to be the intrinsic distorted bonds related to the GB.