Jinghai Zhou

Analytical loss model of power MOSFET

An accurate analytical model is proposed in this paper to calculate the power loss of a metal-oxide semiconductor field-effect transistor. The nonlinearity of the capacitors of the devices and the parasitic inductance in the circuit, such as the source inductor shared by the power stage and driver loop, the drain inductor, etc., are considered in the model. In addition, the ringing is always observed in the switching power supply, which is ignored in the traditional loss model. In this paper, the ringing loss is analyzed in a simple way with a clear physical meaning. Based on this model, the circuit power loss could be accurately predicted. Experimental results are provided to verify the model. The simulation results match the experimental results very well, even at 2-MHz switching frequency.

Adaptive voltage position design for voltage regulators

This paper proposes a general design guideline for the voltage regulator (VR) to achieve adaptive voltage position (AVP). All existing control methods are covered for different kinds of output filter capacitors. Based on the small-signal model analysis, the output impedance and system control bandwidth are discussed. Following the proposed design guidelines, simulation and experimental results demonstrate very good VR transient response.

1-MHz self-driven ZVS full-bridge converter for 48-V power pod and DC/DC brick

In this paper, a self-driven zero-voltage-switching (ZVS) full-bridge converter is proposed. With the proposed self-driven scheme, the combination of the ZVS technique and Self-driven technique recycles the gate driving energy by making use of the input capacitor of the secondary side synchronous rectifier (SR) as the snubber capacitor of the primary side switches. Compared with the external driver, the proposed converter can save driving loss and synchronous rectifier body diode conduction loss. Additionally, compared with the existed level-shifted self-driven scheme for bridge-type symmetrical topologies, its gate signal is very clean and suitable for high-frequency applications. A 1-MHz, 1.2-V/70-A prototype is built to verify the analysis. Experimental results show that it can achieve 81.7% efficiency. And there is an efficiency improvement of 4.7% over conventional phase-shifted full-bridge converter with an external driver.

A self-driven soft-switching voltage regulator for future microprocessors

In conventional high frequency 12-V input voltage regulators (VR), large gate driver loss and body diode conduction loss raise crucial challenges to its gate driver implementation. The proposed self-driven topologies are basically buck-derived multiphase interleaving soft switching topologies, which eliminate the synchronous rectifier MOSFET drivers and save driving loss and body diode loss, so that it is a high efficiency, high power density solution for future microprocessors. A 1U four-phase 1.3-V/100-A VRM running at 1MHz demonstrates its advantages (cost, size and efficiency) over the conventional multiphase buck converter.

Small Signal Modeling of a High Bandwidth Voltage Regulator Using Coupled Inductors

Todays voltage regulator (VR) for the microprocessor requires a current loop to achieve adaptive voltage positioning and phase current sharing. A fundamental limitation, current loop sample hold effect, limits the control bandwidth to be pushed beyond 1/6 of the switching frequency. This paper reveals the limitation of the control bandwidth of a two-phase buck converter using peak current control scheme. The limitation can be overcome by coupling the two output inductors. A new small signal model is proposed to study the sample hold effect in coupled-inductor implementations. The relationship between the coupling coefficient and the sample hold effect is then discussed. Based on these understandings, a strongly coupled two-phase buck converter has double the bandwidth of the noncoupled VR; and this is experimentally verified

A Novel Input-Side Current Sensing Method to Achieve AVP for Future VRs

This paper proposes a new input-side current sensing method for the voltage regulator (VR) to achieve adaptive voltage position (AVP). By applying the proposed method, both good current sensing accuracy and low power dissipation can be achieved. The transient and tolerance analysis of this method are provided and a design guideline is illustrated and experimentally verified

Small Signal Modeling of A High Bandwidth Voltage Regulator Using Coupled Inductors

Todays voltage regulator (VR) for the microprocessor requires a current loop to achieve adaptive voltage positioning (AVP) and phase current sharing. A fundamental limitation, current loop sample hold effect, limits the control bandwidth to be pushed beyond 1/6 of the switching frequency. This paper reveals the limitation of the control bandwidth of a two-phase buck converter using peak current control scheme. The limitation can be overcome by coupling the two output inductors. A new small signal model is proposed to study the sample hold effect in coupled-inductor implementations. The relationship between the coupling coefficient and the sample hold effect is then discussed. Based on these understandings, a strongly coupled two-phase buck converter has double the bandwidth of the non-coupled VR; and this is experimentally verified

High power density electronic ballast for HID lamps

A high power density electronic ballast circuit for high intensity discharge (HID) lamp is proposed. Approaches to achieve high power density are studied. Topologically, the zero-voltage-switching quasi-square-wave concept is adopted when developing the high frequency high efficiency DC/DC front-end converter for the ballast based on the semiconductor loss analysis. On the other hand, a PCB level packaging method is proposed to deal with the thermal related issues, which further improves the power density of the system. A prototype is developed, with a maximum efficiency of 93.3% and the power density of 38.7 W/inch/sup 3/.

I MHz self-driven DC-DC converter for nonisolated 12 V VRs

In conventional high frequency 12 V VRM, large gate driver loss and body diode conduction loss raise crucial challenges to its gate driver implementation. The proposed self-driven topologies are basically buck-derived multiphase interleaving soft switching topologies, which eliminate the synchronous rectifier MOSFET drivers and save driving loss and body diode loss, so that it is a high efficiency, high power density solution for future microprocessors. A 1U 4-phase 1.3 V/100 A VRM running at 1 MHz demonstrates its advantages (cost, size and efficiency) over the conventional multiphase buck converter.

A novel input-side current sensing method to achieve AVP for future VRs

This paper begins with a review of different current sensing methods for the voltage regulator (VR) to achieve adaptive voltage position (AVP). These methods are either inaccurate or with high power consumption for current sensing. Next, a new input-side current sensing method for AVP is proposed. The basic idea of the proposed method is to sense the average input current, which results in low power dissipation for current sensing. Meanwhile, a compensation circuit is proposed to eliminate current sensing errors due to input and output voltage variations. As a result, both low power dissipation and good current sensing accuracy can be achieved by applying the proposed method. The transient and tolerance analysis of this method are provided and a design guideline is illustrated and experimentally verified