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Dive into the research topics where Jingjiao Li is active.

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Featured researches published by Jingjiao Li.


international conference on natural computation | 2010

Color moving object segmentation based on Mixture Gaussian Models

Aiyun Yan; Jingjiao Li; Aixia Wang; Jiao Wang

The segmentation of color images sequence is an important research field of image processing and pattern recognition. In view of the current complex environment, the detection result of moving objects using traditional methods is not satisfying, a background of diminishing method based on the improved Mixture Gaussian Model is proposed. We establish Mixture Gaussian Models for each channel in (R, G, B) color space and utilize difference between current flame and background flame to separate foreground object and background, and use Morphological opening and closing operating to restraint interference. The experimental results indicate that the moving object can be extracted effectively.


international conference on natural computation | 2010

Implement of face recognition system based on Hidden Markov Model

Haipeng Li; Jingjiao Li

This paper achieves the face recognition systems based on Hidden Markov and the extraction of feature vectors which is based on PC. Hidden Markov Model is established according to the facial feature, and the image is preprocessed using the method of Wavelet Transform. After that, the original image is processed in overlap sampling and the method of multi-scale decomposition is applied to each sample block in the wavelet domain. Moreover, it gets dimensionality reduction by using PCA. Finally, the system traines Hidden Markov Model through taking advantage of the result of observation vector. In this way, the recognition rate of the target image will have a certain improvement.


international conference on natural computation | 2013

A SoC design and implementation of dynamic image edge detection based on the LEON3 open source processor

Zhenni Li; Jingjiao Li; Liang Li; Yue Zhao; Chaoqun Rong

A SoC design of dynamic image edge detection system is implemented based on the LEON3 open source soft-core processor in this paper. Sobel edge detection algorithm is selected and designed as an IP core and embedded to the SoC through the interconnect interface AMBA AHB bus. A D5M camera interface IP core is also designed to collect and transfer dynamic image data. The SoC is implemented on FPGA and the dynamic image edge detection IP is simulated by Modelsim and tested within the LEON3 SoC platform. Comparing to the existing dynamic image edge detection system based on microcontroller or DSP, results indicate that this special SoC could fully shows its advantage in high-speed and flexibility. Also the method this paper presents to design a SoC using AMBA AHB bus in the LEON3 architecture is reliable and referable.


Archive | 2012

Research of Vector Quantization Algorithm in Face Recognition System

Jingjiao Li; Haipeng Li; Aixia Wang; Aiyun Yan; Dong An

This thesis proposes a face recognition algorithm based on vector quantization. It precisely introduces the algorithm of vector quantization and implements the face recognition system on PC based on vector quantization algorithm. The face eigenvalue is extracted and vector quantified, and the results are regarded as the training data for Hidden Markov Model. The training target is the Hidden Markov Model. Experiments prove that this algorithm increases the speed of multiple images recognition.


chinese control and decision conference | 2017

A hysteresis comparator for level-crossing ADC

Shuowei Jin; Jingjiao Li; Zhenni Li; Aixia Wang

Sensors are used to collect the natural signals, including rarely change signals. Level-crossing ADC (LC-ADC) employs the idea of irregular sampling, which is adapted to convert the sparse signals. The comparator is an important block of the converter and hysteresis is useful for removing erroneous sampling due to noise. Two hysteresis comparators are presented, one is used in the detection of the signal down and the other is used in the detection of the signal up. The comparators have been implemented in 0.18μm CMOS technology, the area is 940.7μm2 and 864.5μm2 respectively, and the propagation delay for the low-to-high transition is 9.5ns and the propagation delay for the high-to-low transition is 10.5ns with the common mode input voltage is 800mV.


international conference on big data | 2016

Target Detection and Tracking in Big Surveillance Video Data

Aiyun Yan; Jingjiao Li; Zhenni Li; Lan Yao

The big video data information has become widely used in many application areas such as video monitoring. Moving object detection and tracking is one of the most important and difficult problems. This paper puts forward an improved background difference method for moving target area, realizes the motion detection and uses an improved centroid tracking method for target tracking. In our solution, the parallel processing mechanism and powerful computing capability of FPGA platform is applied to improve processing speed and performance of the system. Altera FPGA is chosen as the master control chip, and Qsys setup test system is involved. After multiple tests, the system processes size 320 × 240 RGB image at 30 frames per second, achieving the moving target monitoring and real-time tracking, and the accuracy is above 90 %. This design increases the reliability of the detection and tracking system on the basis of ensuring the running speed.


international conference on big data | 2016

An Asynchronous 2D-Torus Network-on-Chip Using Adaptive Routing Algorithm

Zhenni Li; Jingjiao Li; Aiyun Yan; Lan Yao

An asynchronous 2D-Torus Network-on-Chip (ATNoC) design based on System Verilog is implemented in this paper. A dynamic asynchronous XY routing algorithm DA-XY is proposed and designed as an Intellectual Property (IP) core and embedded to the ATNoC. Asynchronous circuit design methodology is used to design each routing node which could be divided into the following components, that is, receiving module, Hamming decoding module, routing analysis module, splitting module, arbiter module, Hamming encoding module and sending module. A test platform is built to analyze the function and the performance of the asynchronous NoC. The test result shows that the asynchronous NoC could support self-adaptive routing, multi-directional communication, and parallel multi-channel communications.


international conference on intelligent human-machine systems and cybernetics | 2014

A SoC Design and Implementation of H.264 Video Encoding System Based on FPGA

Zhenni Li; Jingjiao Li; Yue Zhao; Chaoqun Rong; Ji Ma

A SoC design of H.264 Video Encoding system is implemented based on FPGA in this paper. Intra prediction algorithm and baseline profile is selected, and H.264 encoder algorithm is designed as an IP core and embedded to the SoC through the interconnect interface AMBA AXI bus. The SoC is implemented on Xilinx Zynq-7000 FPGA and each functional module is simulated by Modelsim and tested within the SoC platform. Comparing to the existing H.264 Video Encoding system based on ARM or DSP, results indicate that this special SoC could fully shows its advantage in high-speed and flexibility. Also the implemented system could meet the required rate for the processing of HD-1080 format video sequence.


international conference on electric information and control engineering | 2012

Design and Implementation of DES IP Core Based on LEON3 SOPC Platform

Jingjiao Li; Chaoqun Rong; Dong An; Danyang Peng

This paper proposes a novel method to design and implement a DES algorithm IP core based on LEON3 SOPC platform. Since this DES IP core is a standard AMBA APB slave device, it can be easily embedded to SoC designs where AMBA bus is used as the interconnect interface, making it much more effective to implement DES algorithm in SoC designs. So comparing with common hardware implementation of DES algorithm, this DES IP core has a very large application prospects in SoC designs. Also the method this paper presents to design an AMBA APB slave device in LEON3 architecture can be referred to. The DES IP is simulated by Modelsim and tested within the LEON3 SOPC platform. Results indicate that this DES IP core has a fine performance and the method this paper demonstrates to design and implement an APB slave device is reliable and referable.


information security and assurance | 2009

The Semi-Iterative Unscented Particle Filtering

Aixia Wang; Jingjiao Li; Aiyun Yan

Particle filtering algorithm has been widely used in solving nonlinear/non Gaussian filtering problems. In this paper, a novel filtering method –mixed unscented particle filtering (MUPF) for nonlinear dynamic systems is proposed. MUPF mainly includes two steps. In the first step, unscented extended Kalman filter was used as proposal distribution to generate particles; then in the second step, after getting means and variances of the proposal distribution, these particles were refined using unscented transformation. To reduce the calculating time, only part of these particles will be refined according to some special rules. This process can be regarded as mixed unscented transformation (MUT). The proposed MUPF algorithm was compared with other five filtering algorithms and the simulating results show that means and variances of MUPF are lower than other filtering algorithms. Index Terms – filtering algorithm, particle filtering, unscented Kalman filter, adaptive factor.

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Zhenni Li

Northeastern University

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Aixia Wang

Northeastern University

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Aiyun Yan

Northeastern University

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Haipeng Li

Northeastern University

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Chaoqun Rong

Northeastern University

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Dong An

Northeastern University

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Lan Yao

Northeastern University

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Shuowei Jin

Northeastern University

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Yue Zhao

Northeastern University

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Ji Ma

Northeastern University

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