Jingjing Xia

Linear filter assisted envelope memory polynomial for analog/radio frequency predistortion of power amplifiers

In this paper, a linear filter assisted envelope memory polynomial (EMP) architecture, for use in a low power analog/radio frequency (RF) predistortion scheme, is presented. The linear filter and the EMP are combined to compensate for the linear memory distortion and the dynamic non-linearity exhibited by an RF power amplifier (PA) driven by wideband modulated signals. A 20-W wideband GaN Doherty PA was used to assess the proposed architectures performance experimentally. The addition of the linear filter improved the performance of the EMP for wideband signals to the extent that results were comparable to those of the memory polynomial approach, while maintaining the structural simplicity of the EMP approach.

Envelope Memory Polynomial Reformulation for Hardware Optimization of Analog-RF Predistortion

This letter addresses the very critical challenge facing the successful deployment of analog-RF predistortion (ARF-PD) and its hardware implementation complexity. A new envelope memory polynomial (EMP) expression is proposed to alleviate the dynamic range requirements for the analog multipliers and digital-to-analog converters. A two-step algorithm is devised to determine the coefficients of the proposed reformulated EMP within a specified hardware limitation. As proof-of-concept validation, a 20 W Doherty power amplifier driven by 20 MHz LTE signals was linearized using the conventional and newly proposed EMP expressions. An adjacent channel leakage ratio (ACLR) of -50.5 dBc was achieved with a dynamic range of about 50 dB for the proposed reformulated EMP and 155 dB for the conventional formulation.

A Novel Broadband Linear-in-Magnitude RF Envelope Detector With Enhanced Detection Speed and Accuracy

In this letter, a novel linear-in-magnitude RF envelope detector is presented which features high detection speed, low detection error and covers a wide range of carrier frequencies. The proposed detector topology employs a voltage-mode input stage which is AC-coupled to a full-wave rectifier. A prototype was implemented in a 0.13 μm CMOS process. Experimental results demonstrated a 3 dB operating frequency of up to 4.2 GHz and a maximal detection speed equal to 190 MHz. The input dynamic range ( ± 1 dB linear error) was 35.5 dB at 1 GHz and 25.3 dB at 3.5 GHz, respectively.

A Hybrid Amplitude/Time Encoding Scheme for Enhancing Coding Efficiency and Dynamic Range in Digitally Modulated Power Amplifiers

Digitally modulated power amplifiers (DMPA) are a promising architecture for practical and highly efficient software-defined radio transmitters. Signal encoding schemes for DMPAs have primarily focused either on amplitude or time domain encoding, neither of which can simultaneously provide high coding efficiency, high dynamic range and low design complexity. In this paper, we propose, analyze and evaluate a new hybrid amplitude/time signal encoding scheme that significantly improves the coding efficiency and dynamic range of DMPAs without significantly increasing design complexity. The proposed hybrid amplitude/time encoding scheme combines both the amplitude domain and the time domain to optimally encode information. Evaluation results show that hybrid amplitude/time encoding yields a 35% increase in the average coding efficiency with respect to conventional time encoding, and is only 6.7% lower than peak efficiency when applied to a Wireless Local Area Network signal with a peak to average power ratio equal to 9.9 dB. A new DMPA architecture, based on the proposed hybrid encoding, is also proposed.

Digitally Assisted Analog/RF Predistorter With a Small-Signal-Assisted Parameter Identification Algorithm

This paper proposes a digitally assisted analog/radio frequency predistorter (ARFPD) and a linear small-signal-assisted parameter identification algorithm suitable for the linearization of power amplifiers driven with wideband and carrier aggregated communication signals. It starts by describing the newly proposed finite-impulse-response assisted envelope memory polynomial (FIR-EMP) model which allows for reduction of hardware implementation complexity while maintaining good linearization capacity and low power overhead. Furthermore, a linear two-step small-signal-assisted parameter identification algorithm is devised to estimate the parameters of the two main blocks of the FIR-EMP model. Measurement results obtained by using the FIR-EMP predistorter demonstrate its excellent linearization capacity when used to compensate for distortion exhibited by gallium nitride Doherty power amplifiers driven by digitally modulated signals with a bandwidth up to 80 MHz. This confirms the potential of ARFPD as a very promising candidate for the linearization of small cell base stations power amplifiers while simultaneously reducing the power overhead compared to the popular digital predistortion technique.

Dual-band linear filter assisted envelope memory polynomial for linearizing multi-band power amplifiers

This paper proposes a dual-band linear filter assisted envelope memory polynomial model (EMP) devised for analog-RF predistortion (ARFPD) systems. The proposed model consists of two finite-impulse-response (FIR) filters preceding a newly formulated dual-band EMP block in forming the pruned 2D-FIR-EMP model. A linear estimation algorithm is devised to identify the coefficients of the proposed pruned 2D-FIR-EMP model. Furthermore, a proof of concept of the digitally-assisted dual-band ARFPD system based on two RF vector multipliers (RF-VM) built using off-the-shelf (OTS) components is presented. Measurement results obtained using the proposed pruned 2D-FIR-EMP proof-of-concept predistorter has demonstrated excellent linearization results in compensating for the distortions exhibited by a gallium nitride Doherty power amplifier driven by dual-band signals.

Wideband Compensation of RF Vector Multiplier for RF Predistortion Systems

This brief presents a wideband compensation method that addresses the hardware imperfections exhibited in an RF vector multiplier (RF-VM) used for RF predistortion systems. A wideband RF-VM model is first developed to embed the various sources of imperfections in an RF-VM. A compensation method is then presented, followed by a newly proposed identification algorithm to determine the parameters of the compensation modules. Experimental results indicated that the use of the proposed compensation method can lead to an improved error vector magnitude of up to 10 dB, when the RF-VM generates a synthesized predistortion signal of 150-MHz modulation bandwidth. Furthermore, an improvement up to 3.9 dB in the adjacent channel leakage ratio was obtained when using the compensated RF-VM to linearize solid-state power amplifiers driven by wideband communication signals.

Digitally Assisted RF-Analog Self Interference Cancellation for Wideband Full-Duplex Radios

This brief presents a new approach to cancelling self-interference in full-duplex radios. By augmenting minimal-complexity analog cancellation hardware using a radio frequency vector multiplier with the flexibility and effectiveness of a digital baseband rational function finite impulse response (FIR) filter, the proposed approach enables excellent cancellation performance over a wide modulation bandwidth. This algorithm is devised by exploiting a simplified baseband equivalent behavioral model of the front-end of the full-duplex radio. This allows the parameters of the rational function FIR filter to be identified linearly using the least-squares estimation. The hardware proof-of-concept prototype, built using off-the-shelf components, demonstrated minimum self-interference cancellations of 50 and 40 dB for digitally modulated test signals with modulation bandwidths of 20 and 40–120 MHz, respectively.

A wideband millimeter-wave differential stacked-FET power amplifier with 17.3 dBm output power and 25% PAE in 45nm SOI CMOS

This paper presents the design of an efficient two-stage m illim eter-wave power amplifier (PA) using stacked field-effect transistors in 45nm silicon-on-insulator (SOI) CMOS technology. It highlights two major issues encountered when designing single-ended multistage PAs at millimeter frequencies (e.g., 60GHz), namely the significant source to ground parasitic inductance and the vulnerability to oscillation at low frequencies. The two-stage differential PA includes input, inter-stage and output matching networks implemented using RF transformers with a high coupling factor and reduced insertion losses. The PA demonstrator showed a 3-dB bandwidth equal to 12GHz (55–67GHz). The small signal gain, peak power added efficiency and peak output power were recorded as 14.5dB, 25% and 17.3dBm, respectively.

A 0.6–2.8GHz CMOS RF vector multiplier with low RMS magnitude and phase errors and high P1dB

In this paper, a fully-integrated CMOS broadband RF vector multiplier (RFVM) with low root-mean-square (RMS) magnitude and phase errors and high linearity is presented. The proposed RFVM includes a three-stage RC poly-phase filter (PPF) to generate the quadrature phase signals, two parallel phase-invariant variable gain amplifiers (VGA) to adjust the amplitude and phase of the input RF signal, and a two-stage post amplifier to provide sufficient output power. Fabricated on a 0.13μm CMOS process, the RFVM demonstrator allowed for magnitude and phase control ranges of 30dB and 360 degrees over a broad operation bandwidth spanning from 0.6 to 2.8GHz. The measured root-mean-square amplitude and phase errors were limited to 0.17dB and 2.5 degrees. A high input 1-dB compression power of 3 to 5dBm was maintained over the targeted bandwidth.