Jiun-Jie Chao
National Taiwan University
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Featured researches published by Jiun-Jie Chao.
Nanotechnology | 2009
Chuan-Mo Lee; Jhong-Yao Wang; Yu-Hsiang Chou; Chung-Liang Cheng; Cha Hsin Chao; Shu-Jia Shiu; Shih-Che Hung; Jiun-Jie Chao; Ming-Han Liu; Wei-Fang Su; Yang-Fang Chen; Ching-Fuh Lin
We report bright white-light electroluminescence (EL) from a diode structure consisting of a ZnO nanorod (NR) and a p-type conducting polymer of poly(fluorine) (PF) fabricated using a hydrothermal method. ZnO NRs are successfully grown on an organic layer of PF using a modified seeding layer. The EL spectrum shows a broad emission band covering the entire visible range from 400 to 800 nm. White-light emission is possible because the ZnO-defect-related emission from the ZnO NR/PF heterostructure is enhanced to become over thousand times stronger than that from the usual ZnO NR structure. This strong green-yellow emission associated with the ZnO defects, combined with the blue PF-related emission, results in the white-light emission. Enhancement of the ZnO-defect emission is caused by the presence of Zn(OH)(2) at the interface between the ZnO NRs and PF. Fourier transform infrared spectroscopy reveals that the absorption peaks at 3441, 3502, and 3574 cm(-1) corresponding to the OH group are formed at the ZnO NR/PF heterostructure, which confirms the enhancement of defect emission from the ZnO NR/PF heterostructure. The processing procedure revealed in this work is a convenient and low-cost way to fabricate ZnO-based white-light-emitting devices.
Nanotechnology | 2010
Jiun-Jie Chao; Shu-Chia Shiu; Shih-Che Hung; Ching-Fuh Lin
In this paper, a new type of hybrid solar cell based on a heterojunction between poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) and vertically aligned n-type GaAs nanowire (NW) arrays is investigated. The GaAs NW arrays are fabricated by directly performing the nano-etching of GaAs wafer with spun-on SiO(2) nanospheres as the etch mask through inductively coupled plasma reactive ion etching. The PEDOT:PSS adheres to the surface of the GaAs NW arrays to form a p-n junction. The morphology of GaAs NW arrays strongly influences the characteristics of the GaAs NW/PEDOT:PSS hybrid solar cells. The suppression of reflectance and the interpenetrating heterojunction interface of GaAs NW arrays offers great improvements in efficiency relative to a conventional planar cell. Compared to the planar GaAs/PEDOT:PSS cells, the power conversion efficiency under AM 1.5 global one sun illumination is improved from 0.29% to 5.8%.
ieee photonicsglobal | 2008
Ching-Fuh Lin; Jing-Shun Huang; Shu-Jia Syu; Jiun-Jie Chao; Chen-Yu Chou; Chieh-Yu Hsiao; Chun-Yu Lee
Hybrid thin-film solar cells are fabricated on the glass substrate using ZnO nanorods, well-aligned single-crystalline Si nanowires (SiNWs), and poly(3-hexylthiophene):[6,6]-phenyl-C61-butyric acid methyl ester (P3HT:PCBM) as well as micro-structured III-V semiconductors . The effect of introducing a solution-processed fullerene as an electron transport layer on the polymer/ZnO nanorod array composite solar cells is investigated . Devices with the fullerene layer exhibit a larger short circuit current density (10.16 mA/cm2) than those without this layer (9.37 mA/cm2). For the Si NWs with P3HT:PCBM, the well-aligned SiNWs are fabricated from Si wafer and transferred onto the glass substrate with the P3HT:PCBM. Such SiNWs provide uninterrupted conduction paths for electron transport, enhancing the optical absorption to serve as an absorber, and increase the surface area for exciton dissociation . Our investigations show that Si NWs are promising for hybrid organic photovoltaic cells with improved performance by increasing the short-circuit current density from 7.17 to 11.61 mA/cm2. III-V semiconductors are also used for thin-film solar cells. InGaP/GaAs two-junction square-based (25 mum times25 mum) cuboid arrays with a height of 6.52 mum were released from GaAs substrates by the epitaxial lift-off process. These InGaP/GaAs cuboid arrays were transplanted to the P3HT film spun on ITO glass substrate. In addition to the significant cost reduction, our method shows the rapid transplantation and the potential for high-efficiency large-area devices fabrication.
Journal of Lightwave Technology | 2013
Shih-Che Hung; Shih-Jieh Lin; Jiun-Jie Chao; Ching-Fuh Lin
Optical solution has been proposed for short-reach interconnects. A primary concern is the integration of photonics and electronics. A method to fabricate crystalline Si waveguides on insulator from bulk Si substrate using a laser reformation technique is here presented. A high-power laser is used to melt and reshape a Si fin structure. This is followed by an oxidation process to produce oxide as an optical isolation layer beneath the Si and form the waveguide structure. The Si waveguide, using laser reformation method in our experiment, has 140 nm width and 420 nm height, showing a single mode property and an effective refractive index of about 2.09. It represents a viable method for creating crystalline Si waveguides on CMOS-compatible Si substrate and reveals the potential of Si photonic devices integrated with Si electronics.
Journal of Vacuum Science & Technology B | 2009
Ding-Shin Wang; Jiun-Jie Chao; Shih-Che Hung; Ching-Fuh Lin
Large-area GaAs nanowires are fabricated using SiO2 nanoparticles as the etching mask. SiO2 nanoparticle monolayer is spin coated on the GaAs substrate. To obtain a uniform monolayer of SiO2 nanoparticles across the substrate, raised temperature, adequate solution concentration, and the substrate treated with a solvent for interface activation are required. With the monolayer of SiO2 nanoparticles as the etching mask, the GaAs substrate is etched by induced-coupled plasma reactive ion etcher (ICP-RIE) to form GaAs nanowires with a high aspect ratio. The diameter and length of GaAs nanowires are 70nm and 1.2μm, respectively. The diameter and length of GaAs nanowires can be controlled by the size of SiO2 nanoparticles and etching time of ICP-RIE.
Journal of The Electrochemical Society | 2010
Shih-Che Hung; Shu-Jia Shiu; Jiun-Jie Chao; Ching-Fuh Lin
This paper describes a method for fabricating deep Si trenches with only a wet chemical etching process. A typical photolithography process was used to define the etching area. Aqueous HF/AgNO 3 and HF/H 2 O 2 solutions were applied to etch silicon nanowire (SiNW) structures in the selected domains. In the former case, a high selectivity between the bare Si surface and photoresist-covered Si surface can be achieved. The SiNWs with a monolithic 〈100〉 direction can be etched in the selected domain. However, additional (010)- and (001)-oriented etchings were observed on the trench sidewall and wafer surface in the latter case. In addition, deep and highly anisotropic trenches were achieved by removing the SiNWs. The Si wafer was immersed in a concentrated aqueous HF/H 2 O 2 solution. A porous structure was formed in the vicinity of Ag nanoparticles, suggesting that one should remove SiNWs completely to achieve deep anisotropic trenches. This method exhibits high anisotropy and is capable of etching deep Si trenches with depths of about 50 μm without an additional etching mask. It effectively minimizes instrument costs and reveals the potential of large-area fabrication.
Semiconductor Science and Technology | 2010
Jiun-Jie Chao; Ding-Shin Wang; Shu-Chia Shiu; Shih-Che Hung; Ching-Fuh Lin
In this study, we present a facile way to fabricate large-scale arrays of GaAs nanowires (NWs) with a high aspect ratio on transparent substrates. It is demonstrated that a monolayer of SiO2 nanoparticles can be effectively used as etch masks for the inductively coupled plasma (ICP) etching process. To form the monolayer of SiO2 nanoparticles on a GaAs substrate, the concentration and temperature of a SiO2 colloidal dispersion solution as well as the interface wetting of the GaAs substrate were investigated. Afterward, by adjusting the ICP etching conditions, the high-aspect-ratio GaAs NWs with cross-sections of 70 nm and lengths of 4.3 ?m were successfully fabricated. Furthermore, the fabricated GaAs NWs were massively transferred onto the transparent substrate at low temperature. The x-ray diffraction spectrum and the scanning electron microscope observation reveal that the transferred GaAs NWs have vertically aligned morphology and good crystal property.
Journal of Lightwave Technology | 2017
Shih-Che Hung; Shih-Jieh Lin; Jiun-Jie Chao; Chia-Yu Chang; Meng-Jie Lin; Ching-Fuh Lin
Lightwave transmission is a promising candidate for data interconnections, including the short-distance data communication. The method by which photonics and electronics ought to be integrated is developing and not well resolved yet. In particular, the different requirements of buried oxide thickness for photonics and electronics hamper their integration on the same chip. In this paper, we present a crystalline Si-core waveguide as the platform of interconnection and proceed to investigate its characteristics. The Si-core of the waveguide on bulk (100) Si substrate is formed by an excimer laser system through shape reformation. The SiO2 cladding is later on created through oxidation process. Though the Si-cores shape has changed, it still preserves its monocrystalline properties, and displays a broadband transmission. This test shows several local defects along axial direction cause obvious scattering of the guided wave, and propagation loss is estimated to be about 7 dB/cm. We think the defects come from an observed wavy structure and this loss is improvable via our proposed methods. In addition, the core distance to substrate is adjustable and the sidewall roughness is good. Hence we proceed to analyze the losses theoretically. The various kinds of loss are potentially reducible to 1 dB/cm, except coupling loss on end facets, which is also improvable with the use of proper coupling devices. These demonstrate the potentiality of the platform for on-chip interconnect applications.
international conference on nanotechnology | 2011
Shu-Chia Shiu; Tzu-Ching Lin; Keng-Lam Pun; Hong-Jhang Syu; Shih-Che Hung; Jiun-Jie Chao; Ching-Fuh Lin
Si nanostructures are promising materials for future photovoltaic applications. To date the Si nanostructures are mainly formed on particular substrates or at high temperatures, greatly limiting their application flexibility. Here we report a two-step metal-assisted etching technique for forming vertically aligned Si nanohole thin films on bulk Si wafers at room temperature. The Si nanohole thin films with a thickness of 5µm can be easily transferred to alien substrates. Because of the low temperature transfer process, it enables a large variety of alien substrates such as glass and plastics to be used. In addition, we demonstrate that the bulk Si substrate can be reused to fabricate Si nanohole thin films. The consumption of bulk Si materials is significantly reduced.
international conference on nanotechnology | 2011
Jiun-Jie Chao; Jyun-Jie Wang; Shu-Chia Shiu; Shih-Che Hung; Ching-Fuh Lin
In this research, we compare hydrothermally synthesized TiO<inf>2</inf> nanorods in an unsealed and a sealed system, respectively. Due to the variation of hydrothermal concentration, the morphology is very different. Then we further pre-fabricate a TiO<inf>2</inf> seed layer by the sol-gel method and then hydrothermally synthesize TiO<inf>2</inf> nanorods. The TiO<inf>2</inf> nanorods can also be grown on the TiO<inf>2</inf> seed layer successfully. This result exhibits the promising potential for the growth of TiO<inf>2</inf> nanorods on versatile substrates.