Jizhen Fu

Discontinuous-Current-Source Drivers for High-Frequency Power MOSFETs

This paper proposes a new current-source driver (CSD) with discontinuous inductor current. Compared to other CSDs proposed in the previous work, the most important advantage of the proposed CSD is the small inductance (typically, 20 nH at 1 MHz switching frequency). This translates into the footprint reduction of as much as 90% compared with the continuous CSDs. Other features of the proposed CSD includes: 1) fast switching speed and reduced switching loss; 2) discontinuous inductor current with low circulating loss; 3) gate energy recovery; and 4) wide range of duty cycle and switching frequency. The experimental results verified the functionality of the proposed CSD. At 12 V input, 1.3 V output, and 1 MHz switching frequency, the new CSD improves the efficiency from 80.7% using a conventional driver to 85.7% at 25 A output, and at 30 A output, from 77.9% to 84.4%.

A New High Efficiency Current Source Driver With Bipolar Gate Voltage

A novel bipolar current source driver (CSD) for power MOSFETs is proposed in this paper. The proposed bipolar CSD alleviates the gate current diversion problem of the existing CSDs by clamping the gate voltage to a flexible negative value (such as -3.5 V) during turn-off transition. Therefore, the proposed driver is able to turn off the MOSFET much faster with a higher effective gate current. The idea presented in this paper can also be extended to other CSDs to further improve the efficiency with high output currents. The experimental results verify the benefits of the proposed CSD. For buck converters with 12 V input at 1 MHz switching frequency, the proposed driver improves the efficiency from 80.5% using the existing CSD to 82.5% (an improvement of 2%) at 1.2 V/30 A, and at 1.3 V/30 A output, from 82.5% using the existing CSD to 83.9% (an improvement of 1.4%).

Switching Loss Analysis Considering Parasitic Loop Inductance With Current Source Drivers for Buck Converters

In this paper, the switching loop inductance was investigated on the Current Source Drivers (CSDs). The analytical model was developed to predict the switching losses. It is noted that although the CSDs can reduce the switching transition time and switching loss greatly, the switching loop inductance still has the current holding effect on the CSDs. This results in high turn off loss for the control MOSFET in a buck converter. Thus, an improved layout was proposed to achieve minimum switching loop inductance. The experimental results verified the significant switching loss reduction owing to the proposed layout of a buck converter with 12V input, 1.3V output and 1MHz.

A new discontinuous Current Source Driver for high frequency power MOSFETs

This paper proposes a new Current Source Driver (CSD) with discontinuous inductor current. Compared to other CSDs proposed in the previous work, the most important advantage of the proposed CSD is the small inductance (typically, 20nH at 1MHz switching frequency). This translates into the footprint reduction of as much as 90%. Other features of the proposed CSD includes: 1) fast switching speed and reduced switching loss; 2) discontinuous inductor current with low circulating loss; 3) gate energy recovery; 4) wide range of duty cycle and switching frequency. The experimental results verified the functionality of the proposed CSD. At 1.3V output, the new CSD improves the efficiency from 80.7% using a conventional driver to 85.7% at 25A output, and at 30A output, from 77.9% to 84.4%.

Adaptive Current Source Drivers for Efficiency Optimization of High-Frequency Synchronous Buck Converters

In this paper, the concept of the adaptive CSDs is proposed for high frequency synchronous buck converters. The idea of the adaptive CSDs is to achieve optimal design of the switching loss reduction and the drive loss reduction for wide load range. It should be noted that the adaptive concept is suitable for both the continuous and discontinuous CSDs regardless the drive circuit topologies. Through investigating the CSD circuits, one simple method to achieve the adaptive drive current based on the adaptive voltages is proposed. The linear regulator can be used to achieve the function of the adaptive voltages and drive currents in a cost-effective manner. A 12V input, 1.3V output and 1MHz synchronous buck converter was built to verify the advantages of the proposed adaptive CSDs.

MOSFET Switching Loss Model and Optimal Design of a Current Source Driver Considering the Current Diversion Problem

A new analytical switching loss model for power MOSFETs driven by the current source driver (CSD) is presented in this paper. The gate current diversion problem, which commonly exists in existing CSDs, is analyzed mathematically. In addition, a new accurate switching loss model considering every switching interval piecewisely is proposed. Based on the proposed loss model, the optimal design of the CSD inductor is achieved to minimize the total power loss for the buck converter. The experimental result verifies the proposed switching loss model and optimal design. The measured loss matches the calculated loss very well; the error between the calculated loss and measured one is less than 10% from 5 A load to 30 A load with 12 V input and 1.3 V output. As compared with the previous study, the efficiency with the optimal CSD inductor is improved from 86.1% to 87.6% at 12 V input and 1.3 V/20 A output and from 82.4% to 84.0% at 12 V input and 1.3 V/30 A output at 1 MHz switching frequency. As compared with the commercial driver-MOSFETs from Renesas and International Rectifier, the buck converter with the optimal CSD still shows better performance.

Accurate switching loss model and optimal design of a current source driver considering the current diversion problem

A new analytical switching loss model for power MOSFETs driven by Current Source Drivers (CSDs) is presented in this paper. The gate current diversion problem, which commonly exists in CSDs, is analyzed. In addition, the proposed loss model considers the Miller Plateau. The optimal design of current source driver is achieved which minimizes the total power loss for the Buck converter. The experimental result verifies the theoretical analysis. Compared with previous work, the efficiency at 1MHz with the optimal current source inductor is improved from 86.1% to 87.6% at 1MHz switching frequency, with 12V input, 1.3V/20A output, and from 82.4% to 84.0% at 1MHz switching frequency, with 12V input, 1.3V/30A output.

Switching loss analysis considering parasitic loop inductance with current source drivers for buck converters

In this letter, the switching loop inductance was investigated on the current-source drivers (CSDs). The analytical model was developed to predict the switching losses. It is noted that although the CSDs can greatly reduce the switching transition time and switching loss, the switching loop inductance still causes the current holding effect on the CSDs. This results in high turn-off loss for the control MOSFET in a buck converter. An improved layout was proposed to achieve minimum switching loop inductance. The experimental results verified the significant switching loss reduction owing to the proposed layout of a 1-MHz buck converter with 12-V input, and 1.3-V and 30-A output.

A novel parameter-independent digital optimal control algorithm for DC-DC Buck converters based on parabolic curve fitting

Recently, optimal control on Buck converter for powering the latest computer central processor units (CPUs) has attracted more and more attention. In this paper, a novel digital control algorithm is presented to achieve the time-optimal response for dc-dc Buck converters without relying on any knowledge of converter design parameters such as output inductance, capacitance and even ESR value. This algorithm is based on the parabolic curve fitting analysis for deriving the algorithm formulas under the step load transients. Furthermore, this algorithm can be extended to adaptive voltage positioning (AVP) applications with simple modifications for a low ESR designed Buck converter. Also, it delivers a practical and cost-effective interface to AVP schemes due to the parameter-independent and current-sensorless detecting mechanism. Finally, simulations and experimental results of a 12 V-1.5 V Buck converter prototype are provided to validate the proposed schemes using digital signal processor (DSP) implementation.

A high efficiency current source driver with negative gate voltage for buck voltage regulators

In this paper a novel current source driver (CSD) for power MOSFETs is proposed. The proposed CSD alleviates the gate current diversion problem of the CSDs in previous work by clamping the gate voltage to a negative value. Therefore, the proposed driver is able to turn off the MOSFET much faster with a higher effective gate current. The idea presented in this paper can also be extended to other CSDs to improve the efficiency further at high output currents. The experimental results verify the benefits of the proposed CSD. For buck converter with 12V input at 1MHz, the proposed driver improves the efficiency from 80.5% using the previous CSD to 82.5% (an improvement of 2%) at 1.2V/30A, and at 1.3V/30A output, from 82.5% to 83.9% (an improvement of 1.4%).