JoAnn Close

High speed op amps: Performance, process and topologies

Complementary bipolar processes developed in the mid 1980s allowed the development of integrated circuit operational amplifiers with bandwidths over 50MHz [1]. In the early 1990s, complementary bipolar processes implemented on SOI extended the attainable bandwidth to 1GHz. In the new millennium, SOI processes incorporating SiGe heterojunction transistors are used to produce IC op amps with bandwidths to nearly 10GHz. Industry trends towards lower supply voltages have made low voltage design techniques increasingly important. Class A/B circuit techniques exploiting complementarity have enhanced slew and distortion performance versus supply current. The demand for low supply voltage operation and differential signal processing has driven the development of differential amplifier topologies.

Analog and Power Management Techniques

Switching DC-DC converters, a staple of electronic systems for decades, were first constructed with discrete transistors and recently as standalone ICs. Now we see that that these key high-efficiency circuits are being embedded in larger SoCs to manage the multiple supply voltages and accuracy requirements of modern ICs. One of the main impediments to integrating these converters has always been the inductor required. Inductors are often bulky and expensive, and one external inductor is typically required for each output voltage. This challenge is being met with both an increase in switching speed while maintaining acceptable efficiency, and the generation of multiple outputs using just a single inductor.

Hall cell geartooth sensor with 15 gauss sensitivity

A monolithic sensor for detecting time-varying magnetic fields, which combines precision analog circuits with a Hall cell, is described. The device withstands the rigorous environment of an automobile engine ignition control system where it detects teeth on a rotating ferrous wheel. The open-collector digital output responds to field changes of 15+or-1 G over a -55 degrees C to 150 degrees C range. Yield is improved by laser trim of silicon chromium resistors, eliminating the process dependence of Hall cell sensitivity. An AC-coupling scheme using an external 1- mu F capacitor rejects system offsets of several hundred G while allowing full sensitivity with signals as slow as 4 Hz. Other features include controlled startup and shutdown behavior and insensitivity to system noise. The 110-transistor. 10.700-mil/sup 2/ device is packaged in a 4-pin SIP, and operates on a single 5- to 16-V supply.<<ETX>>

A 50fA input current junction-isolated JFET opamp

A monolithic opamp with measured 50fA input currents, 0.25mV offset and 5μV/°C offset drift will be reported. The amplifier uses a JFET developed for standard junction-isolated processing that can offer a 10× reduction in input current over other bipolar-compatible JFETs.