John A. Landry | Researchain

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Featured researches published by John A. Landry.

Archive | 1990

Daisy-chained serial shift register for determining configuration of removable circuit boards in a computer system

Harry R. Rogers; John A. Landry; Javier F. Izquierdo

Archive | 1992

Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system

Paul R. Culley; John A. Landry; Dale J. Mayer; Christopher C. Wanner; Guy E. McSwain

Archive | 1992

Apparatus for strictly ordered input/output operations for interrupt system integrity

Dale J. Mayer; John A. Landry; Paul R. Culley

Archive | 1993

Memory accessing system with an interface and memory selection unit utilizing write protect and strobe signals

John S. Thayer; Dale J. Mayer; Javier F. Izquierdo; Paul R. Culley; John A. Landry

Archive | 1989

Multiprocessing system includes interprocessor encoding and decoding logic used for communication between two cards through reduced addressing lines

Javier F. Izquierdo; John A. Landry

Archive | 1992

Multiplexed communication protocol between central and distributed peripherals in multiprocessor computer systems

John A. Landry; Dale J. Mayer; Paul R. Culley

Archive | 1990

Data destination facility.

John S. Thayer; Dale J. Mayer; John A. Landry; Javier F. Izquierdo; Paul R. Culley

Archive | 1992

Positive pulse format noise-filter and negative pulse format extension circuit for conditioning interrupt request signals

Dale J. Mayer; John A. Landry

Archive | 1992

Interrupt handling in an asymmetric multiprocessor computer system

John A. Landry; Paul R. Culley

Archive | 1993

Interrupt request signal noise filter and negative pulse extension circuit

Dale J. Mayer; John A. Landry

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Paul R. Culley

Hewlett-Packard

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Network

Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot

Dive into the research topics where John A. Landry is active.

Publication

Featured researches published by John A. Landry.

Daisy-chained serial shift register for determining configuration of removable circuit boards in a computer system

Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system

Apparatus for strictly ordered input/output operations for interrupt system integrity

Memory accessing system with an interface and memory selection unit utilizing write protect and strobe signals

Multiprocessing system includes interprocessor encoding and decoding logic used for communication between two cards through reduced addressing lines

Multiplexed communication protocol between central and distributed peripherals in multiprocessor computer systems

Data destination facility.

Positive pulse format noise-filter and negative pulse format extension circuit for conditioning interrupt request signals

Interrupt handling in an asymmetric multiprocessor computer system

Interrupt request signal noise filter and negative pulse extension circuit

Collaboration

Dive into the John A. Landry's collaboration.