John A. Landry

Daisy-chained serial shift register for determining configuration of removable circuit boards in a computer system

Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system

Apparatus for strictly ordered input/output operations for interrupt system integrity

Memory accessing system with an interface and memory selection unit utilizing write protect and strobe signals

Multiprocessing system includes interprocessor encoding and decoding logic used for communication between two cards through reduced addressing lines

Multiplexed communication protocol between central and distributed peripherals in multiprocessor computer systems

Data destination facility.

Positive pulse format noise-filter and negative pulse format extension circuit for conditioning interrupt request signals

Interrupt handling in an asymmetric multiprocessor computer system

Interrupt request signal noise filter and negative pulse extension circuit