John H. Scofield

Reproducible technique for fabrication of thin films of high transition temperature superconductors

We report on a new process to make films of Y1Ba2Cu3O7 using coevaporation of Y, Cu, and BaF2 on SrTiO3 substrates. The films have high transition temperatures (up to 91 K for a full resistive transition), high critical current densities (106 A/cm2 at 81 K), and a reduced sensitivity to fabrication and environmental conditions. Because of the lower reactivity of the films, we have been able to pattern them in both the pre‐annealed and post‐annealed states using conventional positive photoresist technology.

Sputtered molybdenum bilayer back contact for copper indium diselenide-based polycrystalline thin-film solar cells

Abstract A method is described for fabricating low-resistivity molybdenum films on soda-lime glass substrates with good adhesion. Films are sputtered onto substrates nominally held at room temperature in a cryo-pumped d.c. magnetron system in a partial pressure of argon. 1-μm-thick films sputtered at low argon pressure were found to have low resistivity (10–15 μΩ cm), were under compressive stress, and suffered from poor adhesion. Films sputtered with high argon pressure had high resistivity (50–250 μΩ cm), were under tensile stress, but adhered well to the glass. By varying argon pressure during deposition, 1-μm-thick molybdenum bilayers have been fabricated with both low resistivity (12–14 μΩ cm) and good adhesion. These films are being used as back contacts for the National Renewable Energy Laboratoys state-of-the-art polycrystalline copper indium gallium diselenide solar cells with good results.

Frequency‐domain description of a lock‐in amplifier

The basic principles behind the operation of a lock‐in amplifier are described. Particular emphasis is placed on looking at the frequency components of the signal present at the various stages of the lock‐in during a typical measurement. The description presented here has been used successfully to explain lock‐in operation to upper‐level laboratory students at Oberlin College.

1/f noise and radiation effects in MOS devices

An extensive comparison of the 1/f noise and radiation response of MOS devices is presented. Variations in the room-temperature 1/f noise of unirradiated transistors in the linear regime of device operation correlate strongly with variations in postirradiation threshold-voltage shifts due to oxide trap charge. A simple number fluctuation model has been developed to semi-quantitatively account for this correlation. The 1/f noise of irradiated n-channel MOS transistors increases during irradiation with increasing oxide-trap charge and decreases during postirradiation positive-bias annealing with decreasing oxide-trap charge. No such correlation is found between low-frequency 1/f noise and interface-trap charge. The noise of irradiated p-channel MOS transistors also increases during irradiation, but in contrast to the n-channel response, the p-channel transistor noise magnitude increases during positive-bias annealing with decreasing oxide-trap charge. A qualitative model involving the electrostatic charging and discharging of border traps, as well as accompanying changes in trap energy, is developed to account for this difference in n- and p-channel postirradiation annealing response. The correlation between the low-frequency 1/f noise of unirradiated devices and their postirradiation oxide-trap charge suggests noise measurements can be used as a nondestructive screen of oxide trap charge related failures in discrete MOS devices and for small scale circuits in which critical transistors can be isolated. It also suggests that process techniques developed to reduce radiation-induced-hole trapping in MOS devices can be applied to reduce the low-frequency 1/f noise of MOS circuits and devices. In particular, reducing the number of oxygen vacancies and vacancy complexes in the SiO/sub 2/ can significantly reduce the 1/f noise of MOS devices both in and outside a radiation environment. >

ac method for measuring low‐frequency resistance fluctuation spectra

An ac technique is described for measuring low‐frequency resistance fluctuation spectra with improved sensitivity over dc methods achieved by avoiding preamplifier 1/f noise. The technique, easily implemented with decade resistors and a lock‐in amplifier, allows the current noise of low‐resistance (r<10 kΩ) specimens to be measured to frequencies below 1 mHz. Use of a center‐tapped, four‐probe specimen geometry allows discrimination between specimen and contact noise and eliminates noise due to bath temperature variations. The technique is demonstrated in use to determine the dependence of the 1/f noise of Cr films on film area. Measurements with simultaneous direct and alternating currents provide means to study the noise of nonlinear devices and frequency‐dependent conductors.

Reconciliation of different gate-voltage dependencies of 1/f noise in n-MOS and p-MOS transistors

We have examined the 1/f noise of 3 /spl mu/m/spl times/16 /spl mu/m, n- and p-MOS transistors as a function of frequency (f), gate-voltage (V/sub g/) and temperature (T). Measurements were performed for 3 Hz/spl les/f/spl les/50 kHz, 100 mV/spl les/|V/sub g/-V/sub th/|/spl les/4 V, and 77 K/spl les/T/spl les/300 K, where V/sub th/ is the threshold voltage. Devices were operated in strong inversion in their linear regimes. At room temperature we find that, for n-MOS transistors, S(V/sub d/)/spl prop/V/sub d//sup 2//(V/sub g/-V/sub th/)/sup 2/, and for p-MOS transistors, we generally find that S(V/sub d/)/spl prop/V/sub d//sup 2//(V/sub g/-V/sub th/, consistent with trends reported by others. At lower temperatures, however, the results can be very different. In fact, we find that the temperature dependence of the noise and the gate-voltage dependence of the noise show similar features, consistent with the idea that the noise at a given T and V/sub g/ is determined by the trap density, D/sub t/(E), at trap energies E=E(T,V/sub g/). Both the T- and V/sub g/-dependencies of the noise imply that D/sub t/(E) tends to be constant near the silicon conduction band edge, but increases as E approaches the valence band edge. It is evidently these differences in D/sub t/(E) that lead to differences in the gate-voltage dependence of the noise commonly observed at room temperature for n- and p-MOS transistors. >

High efficiency Cu(In,Ga)Se/sub 2/-based solar cells: processing of novel absorber structures

Our effort towards the attainment of high performance devices has yielded several devices with total-area conversion efficiencies above 16%, the highest measuring 16.8% under standard reporting conditions (ASTM E892-87, Global 1000 W/m/sup 2/). The first attempts to translate this development to larger areas resulted in an efficiency of 12.5% for a 16.8-cm/sup 2/ monolithically interconnected submodule test structure, and 15.3% for a 4.85-cm/sup 2/ single cell. Achievement of a 17.2% device efficiency fabricated for operation under concentration (22-sun) is also reported. All high efficiency devices reported here are made from graded bandgap absorbers. Bandgap grading is achieved by compositional Ga/(In+Ga) profiling as a function of depth. The fabrication schemes to achieve the graded absorbers, the window materials and contacting are described.

Effects of series resistance and inductance on solar cell admittance measurements

Abstract Admittance measurements have been performed on a variety of 0.43 cm2 area, copper indium gallium diselenide (CIGS) polycrystalline thin film solar cells for frequencies (f) ranging from 1 kHz to 1 MHz and bias voltages (V) ranging from −2.0 to 0.2 V. The bulk of these measurements are not presented here. To extend the usefulness of these measurements, and in particular, to extract information about traps, it is first necessary to account for frequency-dependent effects associated with the series resistance and inductance. Such is the purpose of this paper. The complex admittance of a four-element circuit is calculated and compared with measurements on two typical CIGS solar cells. The model circuit consists of a capacitance C in parallel with a resistance r, with this combination in series with a resistor R and inductor L. C accounts for the depletion capacitance of the diode, and R and r account for series and shunt resistances typically observed in solar cell current-voltage measurements. The series inductance was introduced to account for observed resonance effects in the admittance measurements. Model calculations are shown to be in good agreement with measurements on devices. For our cells, measurements above 300 kHz are seldom useful, as these frequencies are in the regime where series R and L dominate the behavior of the circuit. We find-measurements in the 10–50 kHz range to be most appropriate for determining charge densities from C–V scans.

Physical basis for nondestructive tests of MOS radiation hardness

It was found that the 1/f noise and channel resistance of unirradiated nMOS transistors from a single lot with various gate-oxide splits closely correlate with the oxide-trap and interface trap charge, respectively, following irradiation. The 1/f noise is explained by scattering from interface-trap precursor defects. It appears that both noise and channel mobility measurements may be useful in defining nondestructive hardness assurance test methods for devices fabricated from a single technology. It may be difficult to use either for making cross-technology comparisons. It was found that process techniques that improve the radiation hardness of MOS devices at room temperature can greatly reduce the 1/f noise of MOS devices at cryogenic temperatures. >

Correlation between preirradiation 1/f noise and postirradiation oxide-trapped charge in MOS transistors

The authors have performed a detailed comparison of the preirradiation 1/f noise and the radiation-induced threshold voltage shifts due to oxide-trapped and interface-trapped charge, Delta V/sub ot/ and Delta V/sub it/, for enhancement-mode, 3- mu m-gate, n-channel MOS transistors taken from seven different wafers processed in the same lot. These wafers were prepared with gate oxides of widely varying radiation hardness. It is shown that the preirradiation 1/f noise levels of these devices correlate strongly with the postirradiation Delta V/sub ot/, but not with the postirradiation Delta V/sub it/. These results suggest that 1/f noise measurements may prove useful in characterizing and predicting the radiation response of MOS devices. >