John Hauer

Power hardware-in-the-loop testing of a 500 kW photovoltaic array inverter

The testing of a 500 kW photovoltaic array inverter using power hardware-in-the-loop simulation is described. A real-time simulator is used with a DC amplifier in order to emulate a photovoltaic (PV) array and an AC amplifier to emulate a power grid. The test setup is described in detail and a range of tests that were conducted on the inverter are summarized.

Multifunctional megawatt scale medium voltage DC test bed based on modular multilevel converter (MMC) technology

The recent development of modular multilevel converters (MMC) provides new opportunities for medium voltage DC (MVDC) systems for all electric ship design and offshore wind parks. Therefore, the Center for Advanced Power Systems at Florida State University has recently commissioned a new MVDC power-hardware-in-the-loop laboratory rated at 5 MW at DC voltages between 6...24 kV. The new lab features four individual MMCs, each composed of 36 full-bridge cells, and capable of delivering 210 A at 0...6 kV. This paper describes the entire system in detail, including the advanced current and voltage control concepts along with the state of the art digital control hardware. Selected commissioning results demonstrate the performance of the system under dynamic conditions and provide comparison with simulations obtained from a corresponding controller hardware-in-the-loop setup which is also described in the paper.

Performance of 2G HTS Tapes in Sub-Cooled LN2 for Superconducting Fault Current Limiting Applications

Within the past few years a newer, more robust type of superconductor known as 2nd Generation High Temperature Superconductor (HTS) wire, has become available in sufficient quantity and lengths for developers to build prototype devices and test their capabilities. This new material offers the potential for revolutionary changes in superconducting transformers and Super conducting Fault Current Limiters to enable better thermal stability and fast quenching capabilities that can meet the stringent demands of large transient faults for distribution and transmission power lines. This manuscript discusses the manufacturing and latest tests and capabilities of sub-cooled superconducting fault current limiter device and modules designed for distribution and trans mission lines. We will also discuss the advantages and superior performance of the new 2nd Generation HTS superconductors under sub-cooled liquid nitrogen operation when used in super conducting fault current limiters. The feasibility demonstration and performance of sub-cooled SFCL superconducting modules for distribution and transmission SFCL devices will be discussed.

Multifunctional Megawatt-Scale Medium Voltage DC Test Bed Based on Modular Multilevel Converter Technology

Recent developments in modular multilevel converters (MMCs) provide new opportunities for medium-voltage dc (MVDC) systems for all-electric ship design and offshore wind farms. The Center for Advanced Power Systems at Florida State University has recently commissioned a new MVDC power hardware-in-the-loop laboratory rated at 5 MW at dc voltages from 6 to 24 kV. The new lab features four individual MMCs, each composed of 36 full-bridge cells, capable of delivering 210 A at any voltage in the range of 0–6 kV. This paper describes the entire system in detail, including the advanced current and voltage control concepts along with the state-of-the-art digital control hardware. Selected commissioning results are shown, which demonstrate the performance of the system under dynamic conditions and provide comparison with simulations obtained from a corresponding controller hardware-in-the-loop setup. The results indicate that an MMC-based MVDC system is a strong candidate for the ship power system because of its excellent fault management capability. The setup can be used for the understanding and design of fast fault management schemes in a breakerless MVDC system in the future all-electric ship.

Test environment for a novel medium voltage impedance measurement unit

Small signal stability of converter-based power distribution systems can be evaluated with the help of impedance characterization, which provides a means to predict the effect of interactions. These techniques have great Navy relevance as future ships may be based on medium voltage distribution networks of interconnected feedback-controlled switching power converters. These networks will be subject to converter interactions and potential instability. This paper summarizes work done to prepare full scale testing of the first medium voltage, MW scale impedance measurement unit which was recently developed using SiC technology.

MW-scale power hardware-in-the-loop experiments of rapid power transfers in MVDC naval shipboard power systems

A Medium Voltage DC (MVDC), modular multilevel converter (MMC)-type, MW-scale, power hardware-in-the-loop (PHIL) advanced test facility is being utilized to better understand the impact of fast power transfer between dynamic loads in a notional MVDC shipboard system. In these experiments PHIL simulations demonstrate the transfer of power between two MW-scale, MMC-based loads in a time frame of milliseconds in a 5 kV DC system. The current work also includes the first use of an AC variable voltage source (VVS) as a power source for an MMC. PHIL and controller hardware-in-the-loop (CHIL) test results include a rest-of-system (ROS) simulation of a notional set of ship components. Results will show a distinct aspect to MVDC systems, tolerance to AC side excursions while maintaining the DC bus. Ramp rates that far exceed MIL-STD-1399 are demonstrated in an MMC-based MVDC system architecture. Comparison of CHIL and PHIL results are also presented.

Modular multilevel converter based test bed for mvdc applications — A case study with a 12 kV, 5 MW setup

The Modular Multilevel Converter (MMC) topology has a wide area of possible applications. Features like redundancy at the module level and fault current limiting capability makes it a robust solution for many power applications. Moreover, this topology is very useful as a test equipment for Power Hardware in-the-Loop simulations, especially as a DC grid simulator. This paper describes a recently commissioned MMC based test bed built with four MMCs capable to operate at up to 5 MW power at 6 to 24 kV, depending upon which system configuration is chosen. Test results for the 12 kV configuration are presented along with a detailed description of all the salient control modules. It is concluded that due to its flexibility, this MVDC laboratory can serve the research and development community in addressing and de-risking a broad range of system integration and technology challenges.

Megawatt-scale power hardware-in-the-loop simulation testing of a power conversion module for naval applications

In June through October of 2014, power-hardware-in-the-loop (PHIL) simulation testing of a 1.2 MW, 4.16 kV AC / 1 kV DC power conversion module for naval applications was conducted. In these tests, the device-under-test (DUT) was interfaced to a virtual surrounding system that was generally representative of the power system of a future surface combatant. Tests were focused on demonstration of operation and performance of the DUT through dynamic conditions in a realistic environment, collection of data for characterization and validation of models of the DUT, and collection of data for assessment of the accuracy and suitability of the approach for testing future power conversion modules. These tests were the culmination of numerous coordinated efforts over preceding months to identify, implement, and verify the necessary surrounding systems and supporting models, define meaningful test procedures, and develop, implement, and test appropriate controls and protection systems. The tests successfully concluded with a large amount of data of the behavior of the DUT under a wide range of expected system conditions. Moreover, this project identified the need to further develop PHIL interface algorithms such as the damped impedance method to improve accuracy and stability of future PHIL experiments at the megawatt scale.

Power Hardware-in-the-Loop-Based Anti-Islanding Evaluation and Demonstration

The National Renewable Energy Laboratory (NREL) teamed with Southern California Edison (SCE), Clean Power Research (CPR), Quanta Technology (QT), and Electrical Distribution Design (EDD) to conduct a U.S. Department of Energy (DOE) and California Public Utility Commission (CPUC) California Solar Initiative (CSI)-funded research project investigating the impacts of integrating high-penetration levels of photovoltaics (PV) onto the California distribution grid. One topic researched in the context of high-penetration PV integration onto the distribution system is the ability of PV inverters to (1) detect islanding conditions (i.e., when the distribution system to which the PV inverter is connected becomes disconnected from the utility power connection) and (2) disconnect from the islanded system within the time specified in the performance specifications outlined in IEEE Standard 1547. This condition may cause damage to other connected equipment due to insufficient power quality (e.g., over-and under-voltages) and may also be a safety hazard to personnel that may be working on feeder sections to restore service. NREL teamed with the Florida State University (FSU) Center for Advanced Power Systems (CAPS) to investigate a new way of testing PV inverters for IEEE Standard 1547 unintentional islanding performance specifications using power hardware-in-loop (PHIL) laboratory testing techniques.