John M. Chapin

The Stanford FLASH multiprocessor

The FLASH multiprocessor efficiently integrates support for cache-coherent shared memory and high-performance message passing, while minimizing both hardware and software overhead. Each node in FLASH contains a microprocessor, a portion of the machines global memory, a port to the interconnection network, an I/O interface, and a custom node controller called MAGIC. The MAGIC chip handles all communication both within the node and among nodes, using hardwired data paths for efficient data movement and a programmable processor optimized for executing protocol operations. The use of the protocol processor makes FLASH very flexible --- it can support a variety of different communication mechanisms --- and simplifies the design and implementation.This paper presents the architecture of FLASH and MAGIC, and discusses the base cache-coherence and message-passing protocols. Latency and occupancy numbers, which are derived from our system-level simulator and our Verilog code, are given for several common protocol operations. The paper also describes our software strategy and FLASHs current status.

Hive: fault containment for shared-memory multiprocessors

Reliability and scalability are major concerns when designing operating systems for large-scale shared-memory multiprocessors. In this paper we describe Hive, an operating system with a novel kernel architecture that addresses these issues. Hive is structured as an internal distributed system of independent kernels called cells. This improves reliability because a hardware or software fault damages only one cell rather than the whole system, and improves scalability because few kernel resources are shared by processes running on different cells. The Hive prototype is a complete implementation of UNIX SVR4 and is targeted to run on the Stanford FLASH multiprocessor. This paper focuses on Hives solution to the following key challenges : (1) fault containment, i.e. confining the effects of hardware or software faults to the cell where they occur. and (2) memory sharing among cells, which is required to achieve application performance competitive with other multiprocessor operating systems. Fault containment in a shared-memory multiprocessor requires defending each cell against erroneous writes caused by faults in other cells. Hive prevents such damage by using the FLASH firewall, a write permission bit-vector associated with each page of memory, and by discarding potentially corrupt pages when a fault is detected. Memory sharing is provided through a unified file and virtual memory page cache across the cells, and through a unified free page frame pool. We report early experience with the system, including the results of fault injection and performance experiments using SimOS, an accurate simulator of FLASH. The effects of faults were contained to the cell in which they occurred in all 49 tests where we injected fail-stop hardware faults, and in all 20 tests where we injected kernel data corruption. The Hive prototype executes test workloads on a four-processor four-cell system with between 0% and 11% slowdown as compared to SGI IRIX 5.2 (the version of UNIX on which it is based).

COGNITIVE RADIOS FOR DYNAMIC SPECTRUM ACCESS - The Path to Market Success for Dynamic Spectrum Access Technology

Rapid progress is being made in the technology for dynamic spectrum access (DSA) radio systems. However, the structure and dynamics of the wireless services market must also evolve for DSA to succeed. This article examines the interlinked technical and economic issues associated with markets for DSA-based wireless services. We use this analysis to make technical and policy recommendations supporting the commercial success of DSA technology

Memory system performance of UNIX on CC-NUMA multiprocessors

This study characterizes the performance of a variant of UNIX SVR4 on a large shared-memory multiprocessor and analyzes the effects of possible OS and architectural changes. We use a nonintrusive cache miss monitor to trace the execution of an OS-intensive multiprogrammed workload on the Stanford DASH, a 32-CPU CC-NUMA multiprocessor (CC-NUMA multiprocessors have cache-coherent shared memory that is physically distributed across the machine). We find that our version of UNIX accounts for 24% of the workloads total execution time. A surprisingly large fraction of OS time (79%) is spent on memory system stalls, divided equally between instruction and data cache miss time. In analyzing techniques to reduce instruction cache miss stall time, we find that replication of only 7% of the OS code would allow 80% of instruction cache misses to be serviced locally on a CC-NUMA machine. For data cache misses, we find that a small number of routines account for 96% of OS data cache stall time. We find that most of these misses are coherence (communication) misses, and larger caches will not necessarily help. After presenting detailed performance data, we analyze the benefits of several OS changes and predict the effects of altering the cache configuration, degree of clustering, and cache coherence mechanism of the machine. (This paper is available via http://wwwflash.stanford.edu.)

Hardware fault containment in scalable shared-memory multiprocessors

Current shared-memory multiprocessors are inherently vulnerable to faults: any significant hardware or system software fault causes the entire system to fail. Unless provisions are made to limit the impact of faults, users will perceive a decrease in reliability when they entrust their applications to larger machines. This paper shows that fault containment techniques can be effectively applied to scalable shared-memory multiprocessors to reduce the reliability problems created by increased machine size.The primary goal of our approach is to leave normal-mode performance unaffected. Rather than using expensive fault-tolerance techniques to mask the effects of data and resource loss, our strategy is based on limiting the damage caused by faults to only a portion of the machine. After a hardware fault, we run a distributed recovery algorithm that allows normal operation to be resumed in the functioning parts of the machine.Our approach is implemented in the Stanford FLASH multiprocessor. Using a detailed hardware simulator, we have performed a number of fault injection experiments on a FLASH system running Hive, an operating system designed to support fault containment. The results we report validate our approach and show that in conjunction with an operating system like Hive, we can improve the reliability seen by unmodified applications without substantial performance cost. Simulation results suggest that our algorithms scale well for systems up to 128 processors.

Time-limited leases in radio systems [Topics in Radio Communications]

A time-limited lease is a set of rights that expires after a specified duration. We analyze ways to use leases to facilitate innovation in radio devices and wireless communication. In our vision, manufacturers include in their devices a simple, secure subsystem that contains a clock and disables specific transmit capabilities if no extension message is received by the end of the lease period. When devices provide this support, regulators may use certification leases rather than permanent grants to accelerate deployment of innovative radios. Spectrum rights holders may use leases to reduce risk in secondary spectrum market transactions. Firms collaborating in innovative wireless service business models can better retain control of their respective rights. We examine both the technical and policy issues associated with leases.

On the convergence of wired and wireless access network architectures

Wired and wireless access networks continue to evolve toward higher-capacity, multi-service systems. Recent wireless broadband networks such as 3G LTE and WiMax provide a general-purpose IP platform with over-the-top services at the application layer, which is similar to the design of wired IP platform networks. This paper examines whether wired and wireless access networks are likely to converge on a common architecture, or if not, whether wireless networks are likely to converge on a common wireless architecture. We conclude that the answer to both questions is No. We identify fundamental and persistent differences between wired and wireless networking that will propel wired and wireless access network architectures on divergent evolutionary paths. Whereas we expect wired broadband access networks to continue to evolve toward a common general-purpose platform architecture, we expect wireless networks to remain heterogeneous. The inherent scarcity of radio frequency spectrum emerges as the key reason for this prediction. We examine the implications of divergent evolutionary paths for market structure and regulatory policy.

Time-Limited Leases for Innovative Radios

A time-limited lease is a set of rights granted to an entity, system or device that expires after a specified duration. Leases are widely used in computer and network design. They are useful whenever it is difficult to revoke rights explicitly, such as in cases where the rights holders cannot be cost-efficiently located or contacted. This paper analyzes ways to use the lease concept to facilitate innovation in radio devices and wireless communication. In our vision, manufacturers include in their devices a simple, secure subsystem that contains a clock and controls critical features such as transmitter power and frequency settings. The subsystem has enough computing power to validate cryptographically-signed lease extension messages. It disables specified radio features if no extension message has been received by the end of the lease period. These requirements are not onerous for the types of radios where leases would be used. When devices provide this support, regulators may use certification leases rather than permanent grants to accelerate deployment of innovative radios. Spectrum rights holders may use leases to reduce risk in secondary spectrum market transactions. Firms collaborating in innovative wireless service business models can better retain control of their respective rights. We investigate leases from both technical and policy perspectives and conclude that they can provide significant benefits for the commercialization and deployment of innovative radios.

Implementing efficient fault containment for multiprocessors: confining faults in a shared-memory multiprocessor environment

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The next 10 years of DOD wireless networking research

This paper recommends a coherent research program that will meet the DODs highest priority needs in wireless networking over the next decade. The focus is on the network layer, with some investigation of areas where other layers (RF, link, transport) must evolve in order to facilitate networking improvements. The paper analyzes the wireless networking research needed to meet DOD user requirements in five areas: foundational capabilities, operations under spectrum scarcity, a fully network-enabled force, conflicts with asymmetric adversaries, and conflicts with peer adversaries. A common thread throughout the analysis is the critical importance of cost reduction in both acquisition and operations. Research that enables wider use of wireless communications under fixed or declining budgets is considered just as important as research that increases the underlying wireless communications capability.