Jonas C. Geyer

Coherent Equalization and POLMUX-RZ-DQPSK for Robust 100-GE Transmission

We discuss the use of a coherent digital receiver for the compensation of linear transmission impairments and polarization demultiplexing in a transmission system compatible with a future 100-Gb/s Ethernet standard. We present experimental results on the transmission performance of 111 Gbit/s POLMUX-RZ-DQPSK. For a dense WDM setup with channels carrying 111 Gbit/s with a 50 GHz channel spacing (2.0 bits/s/Hz), we show the feasibility of 2375 km transmission. This is enabled through coherent detection which results in excellent noise performance, and subsequent electronic equalization which provides the high tolerance to polarization mode dispersion and chromatic dispersion (CD). Furthermore, we discuss the impact of sampling and digital signal processing with either 1 or 2 samples/bit. We show that when combined with low-pass electrical filtering, 1 sample/bit signal processing is sufficient to obtain a large tolerance towards CD. The proposed modulation and detection techniques enable 111 Gbit/s transmission that is directly compatible with the existing 10 Gbit/s infrastructure.

Channel Parameter Estimation for Polarization Diverse Coherent Receivers

A robust in-service estimation of fiber channel parameters from equalizer parameters of a polarization diverse coherent receiver is presented. The equations used for estimation are evolved from a theoretical fiber channel model. The theory is validated based on simulations and data from transmission experiments.

Impact of Polarisation Dependent Loss on Coherent POLMUX-NRZ-DQPSK

We present simulations and measurements on the effect of PDL on a POLMUX-NRZ- DQPSK signal. We show that the orientation between the POLMUX signal and PDL element has a major impact on the OSNR performance.

Efficient frequency domain chromatic dispersion compensation in a coherent Polmux QPSK-receiver

We investigate frequency domain chromatic dispersion equalization in an ASIC for digital coherent signal processing. Improved chromatic dispersion tolerance can be achieved by using modified coefficients, which utilize the equalizer more efficiently.

Joint-polarization carrier phase estimation for XPM-limited coherent polarization-multiplexed QPSK transmission with OOK-neighbors

We demonstrate joint polarization carrier phase estimation for XPM-limited channels with significant improvements over standard methods, demonstrated on measurements of 43 Gb/s NRZ-CP-QPSK with 10.7 Gb/s OOK neighbors.

Real-time DSP for 100+ Gb/s

We discuss the commercial context and technical requirements to 100G coherent interfaces and illustrate ASIC design decisions and challenges, looking beyond 100G as well.

Laser Linewidth Estimation by Means of Coherent Detection

In this letter, we present a novel approach to measure the Lorentzian linewidth of a laser source. The approach is based on a heterodyne detection scheme, such as may be implemented in a coherent optical receiver for data communications, using both in-phase and quadrature information of the optical field. In contrast to previously published works, this approach does not suffer from modulation effects on the laser output.

Optical Performance Monitoring using a 43Gb/s realtime coherent receiver

We present Optical Performance Monitoring from the equalizer filter setting of an FPGA-based Realtime 43Gb/s Polarization Diverse Coherent Receiver. Chromatic Dispersion and Polarization Mode Dispersion of the optical transmission link are independently estimated from the blindly adapted equalizer filter. The accuracy of the estimates is demonstrated based on measurements.

Real-time prototypes for digital coherent receivers

We review real-time and off-line processing techniques for the proto-typing of a digital coherent receiver.

Digital Signal processing — from simulation to silicon

Optical communications systems at 10, 40 and WOG now use digital signal processing to enhance the signal tolerance against channel impairments such as chromatic dispersion and PMD. The power of digital signal processing is driven by developments in CMOS integration, which push the limits of gate count, feature sizes and development budgets. But what steps are involved in developing a full custom ASIC ? What are the pitfalls and challenges ? This tutorial outlines the development of an ASIC for a CP-QPSK transponder.