Jonathan Lau

Three-dimensional holey-graphene/niobia composite architectures for ultrahigh-rate energy storage

As with donuts, the holes matter Improving the density of stored charge and increasing the speed at which it can move through a material are usually opposing objectives. Sun et al. developed a Nb2O5/holey graphene framework composite with tailored porosity. The three-dimensional, hierarchically porous holey graphene acted as a conductive scaffold to support Nb2O5. A high mass loading and improved power capability were reached by tailoring the porosity in the holey graphene backbone with higher charge transport in the composite architecture. The interconnected graphene network provided excellent electron transport, and the hierarchical porous structure in the graphene sheets facilitated rapid ion transport and mitigated diffusion limitations. Science, this issue p. 599 A graphene/Nb2O5 composite shows optimized electron and ion transport. Nanostructured materials have shown extraordinary promise for electrochemical energy storage but are usually limited to electrodes with rather low mass loading (~1 milligram per square centimeter) because of the increasing ion diffusion limitations in thicker electrodes. We report the design of a three-dimensional (3D) holey-graphene/niobia (Nb2O5) composite for ultrahigh-rate energy storage at practical levels of mass loading (>10 milligrams per square centimeter). The highly interconnected graphene network in the 3D architecture provides excellent electron transport properties, and its hierarchical porous structure facilitates rapid ion transport. By systematically tailoring the porosity in the holey graphene backbone, charge transport in the composite architecture is optimized to deliver high areal capacity and high-rate capability at high mass loading, which represents a critical step forward toward practical applications.

Monolithic Flexible Supercapacitors Integrated into Single Sheets of Paper and Membrane via Vapor Printing

A novel approach to fabricate supercapacitors (SCs) via vapor printing, specifically oxidative chemical vapor deposition (oCVD), is demonstrated. Compared to stacking multiple layers into a SC, this method enables the monolithic integration of all components into a single-sheet substrate, minimizing the inactive materials and eliminating the possibility of multilayer delamination. Electrodes comprised of pseudocapacitive material, poly(3,4-ethylenedioxythiophene) (PEDOT), are deposited into both sides of a sheet of flexible porous substrate. The film deposition and patterning are achieved in a single step. The oCVD PEDOT penetrates partially into the porous substrate from both surfaces, while leaving the interior of the substrate serving as a separator. Near the surface, the PEDOT coating conforms to the substrates structure without blocking the pores, resembling the substrates intrinsic morphology with high surface area. The porously structured PEDOT coating, paired with in situ ion gel electrolyte synthesis, gives enhanced electrode-electrolyte interfaces. The monolithic device demonstrates high volumetric capacitance (11.3 F cm-3 ), energy density (2.98 mWh cm-3 ), and power density (0.42 W cm-3 ). These outstanding performance metrics are attributed to the large loading of active materials, minimization of inactive materials, and good electrode-electrolyte interfaces. SC arrays can be printed on a single substrate without the use of wire interconnects.

Nanoscale, conformal polysiloxane thin film electrolytes for three-dimensional battery architectures

We report the development of nanoscale (10–40 nm), conformal thin film electrolytes realized by doping lithium ions (Li+) into poly-(tetravinyltetramethylcyclotetrasiloxane) (PV4D4) films, which were synthesized by initiated chemical vapor deposition (iCVD). This is the first time nanoscale films with siloxane ring moieties, which are excellent electrical insulators, have been demonstrated as room temperature ionic conductors. The films exhibit minimal changes in morphology and thickness during lithiation and are also demonstrated to be easily scalable over large areas. We show that the conformal nature of the iCVD polymerization process realizes complete coverage of nanostructured electrodes like nanowires by a uniform, continuous, and pinhole-free thin film, making the polysiloxane films attractive as a novel class of nanoscale electrolytes for the emerging field of three-dimensional (3D) batteries.

iCVD Cyclic Polysiloxane and Polysilazane as Nanoscale Thin-Film Electrolyte: Synthesis and Properties.

A group of crosslinked cyclic siloxane (Si-O) and silazane (Si-N) polymers are synthesized via solvent-free initiated chemical vapor deposition (iCVD). Notably, this is the first report of cyclic polysilazanes synthesized via the gas-phase iCVD method. The deposited nanoscale thin films are thermally stable and chemically inert. By iCVD, they can uniformly and conformally cover nonplanar surfaces having complex geometry. Although polysiloxanes are traditionally utilized as dielectric materials and insulators, our research shows these cyclic organosilicon polymers can conduct lithium ions (Li(+) ) at room temperature. The conformal coating and the room temperature ionic conductivity make these cyclic organosilicon polymers attractive for use as thin-film electrolytes in solid-state batteries. Also, their synthesis process and properties have been systemically studied and discussed.

Synthesis and Properties of a Photopatternable Lithium‐Ion Conducting Solid Electrolyte

One of the important considerations for the development of on-chip batteries is the need to photopattern the solid electrolyte directly on electrodes. Herein, the photopatterning of a lithium-ion conducting solid electrolyte is demonstrated by modifying a well-known negative photoresist, SU-8, with LiClO4 . The resulting material exhibits a room temperature ionic conductivity of 52 µS cm-1 with a wide electrochemical window (>5 V). Half-cell galvanostatic testing of 3 µm thin films spin-coated on amorphous silicon validates its use for on-chip energy-storage applications. The modified SU-8 possesses excellent mechanical integrity, is thermally stable up to 250 °C, and can be photopatterned with micrometer-scale resolution. These results present a promising direction for the integration of electrochemical energy storage in microelectronics.

Carbon-ionogel supercapacitors for integrated microelectronics.

To exceed the performance limits of dielectric capacitors in microelectronic circuit applications, we design and demonstrate on-chip coplanar electric double-layer capacitors (EDLCs), or supercapacitors, employing carbon-coated gold electrodes with ionogel electrolyte. The formation of carbon-coated microelectrodes is accomplished by solution processing and results in a ten-fold increase in EDLC capacitance compared to bare gold electrodes without carbon. At frequencies up to 10 Hz, an areal capacitance of 2.1 pF μm(-2) is achieved for coplanar carbon-ionogel EDLCs with 10 μm electrode gaps and 0.14 mm(2) electrode area. Our smallest devices, comprised of 5 μm electrode gaps and 80 μm(2) of active electrode area, reach areal capacitance values of ∼0.3 pF μm(-2) at frequencies up to 1 kHz, even without carbon. To our knowledge, these are the highest reported values to date for on-chip EDLCs with sub-mm(2) areas. A physical EDLC model is developed through the use of computer-aided simulations for design exploration and optimization of coplanar EDLCs. Through modeling and comparison with experimental data, we highlight the importance of reducing the electrode gap and electrolyte resistance to achieve maximum performance from on-chip EDLCs.

Scaled carbon-ionogel supercapacitors for electronic circuits

Capacitors are ubiquitous in signal processing circuits. Dielectric capacitors based on metal-oxide-semiconductor (MOS) and metal-insulator-metal (MIM) designs are currently the industry standard for on-chip charge storage. By comparison, electric double-layer capacitors (EDLC), or supercapacitors, offer capacitances that are orders of magnitude higher than dielectric capacitors. In this paper we present some early work in fabricating solid-state, on-chip EDLC.