Jonathan M. Nash

A Scalable Shared Queue on a Distributed Memory Machine

The emergence of low latency, high throughput routers means that network locality issues no longer dominate the performance of parallel algorithms. One of the key performance issues is now the even distribution of work across the machine, as the problem size and number of processors increase. This paper describes the implementation of a highly scalable shared queue, supporting the concurrent insertion and deletion of elements. The main characteristics of the queue are that there is no fixed limit on the number of outstanding requests and the performance scales linearly with the number of processors (subject to increasing network latencies). The queue is implemented using a general-purpose computational model, called the WPRAM. The model includes a shared address space which uses weak coherency semantics. The implementation makes extensive use of pairwise synchronization and concurrent atomic operations to achieve scalable performance. The WPRAM is targeted at the class of distributed memory machines which use a scalable interconnection network.

Implementation Issues Relating to the WPRAM Model for Scalable Computing

Modern parallel processing machines are becoming more scalable through advances in network technology. It is now important to have a scalable computational model to support the design and analysis of algorithms. This paper describes a practical implementation of the WPRAM model, which has been used at Leeds for a number of years. The distinctive features of the WPRAM are the use of a weakly coherent shared address space, and the support of fine-grain and highly irregular forms of parallelism. The implementation strategy concentrates on the issues of scalability and good practical performance, with particular attention given to the support of the shared address space.

Portable Parallel Adaptation of Unstructured 3D Meshes

The need to solve ever-larger transient CFD problems more efficiently and reliably has led to the use of mesh adaptation on distributed memory parallel computers. PTETRAD is a portable parallelisation of a general-purpose, unstructured, tetrahedral adaptation code. The variation of the tetrahedral mesh density both in space and time gives rise to dynamic load balancing problems that are time-varying in an unpredictable manner. The performance of a C/MPI version of PTETRAD will be demonstrated and the implementation of complex parallel hierarchical data-structures discussed. The need to make coding of such applications easier is addressed through the design of a novel abstract interface. The relationship of this interface to existing software and hardware systems will be described and the performance benefits illustrated by means of an example. The portable implementation of this interface by means of shared abstract data types will be considered.

A Parallelisation Approach for Supporting Scalable and Portable Computing

This paper describes a strategy for the structuring and analysis of parallel code, using shared abstract data types (SADTs). SADTs are used to provide scalability, and support for modular and portable code development. An example of their usage is presented for a dynamic load balancing method. A framework for performance analysis is described, using an extension of the bulk synchronous parallelism (BSP) approach, and performance results are presented for the Cray T3D.

Scalable and predictable performance for irregular problems using the WPRAM computational model

Abstract There are well defined methods for supporting regular problems with scalable performance, typified by the HPF language and the BSP model. Less well understood is the solution of more irregular problems, supporting complex shared data structures and task dependencies, and typically requiring dynamic load balancing to sustain high performance. It is demonstrated how the use of a typed shared memory, using the notion of Shared Abstract Data Types (SADTs), together with an extended BSP model, the WPRAM, can support irregular problems in a structured manner. A number of SADTs are used to implement a solution of the traveling salesman problem on the Cray T3D machine.

An optimal randomized planar convex hull algorithm with good empirical performance

We describe a new randomized parallel algorithm for computing the planar convex hull of n points on a P processor-memory pair machine communicating through a network for which O(log p) routing is possible. We show that the algorithm has optimal O(n log n/p) performance provided that p = o(rt/ log3 n). We report extensive computational experience with the algorithm which supports its theoretical claims.

Using SADTs to support irregular computational problems

There are well defined methods for supporting regular problems with scalable performance, typified by the HPF language and the BSP model. Less well understood is the solution of more irregular problems, supporting complex shared data structures and task dependencies, and typically requiring dynamic load balancing to sustain high performance. It is demonstrated how the use of Shared Abstract Data Types (SADTs), together with an extended BSP cost model, can support irregular problems in a structured manner An SADT is an extension of a serial ADT which allows the concurrent invocation of its methods. A number of SADTs are used to implement a solution of the travelling salesman problem on the Cray T3D machine, and a description of the restructuring of a parallel CFD code using SADTs is provided, with initial results given for the Cray T3E.

A Structured SADT Approach to the Support of a Parallel Adaptive 3D CFD Code

The parallel implementation of unstructured adaptive tetrahedral meshes for the solution of transient flows requires many complex stages of communication. This is due to the irregular data sets and their dynamically changing distribution. This paper describes the use of Shared Abstract Data Types (SADTs) in the restructuring of such a code, called PTETRAD. SADTs are an extension of an ADT with the notion of concurrent access. The potential for increased performance and simplicity of code is demonstrated, while maintaining software portability. It is shown how SADTs can raise the programmers level of abstraction away from the details of how data sharing is supported. Performance results are provided for the SGI Origin2000 and the Cray T3E machines.

Scalable Sharing Methods Can Support a Simple Performance Model

The Bulk Synchronous Parallelism (BSP) model provides a simple and elegant cost model, as a result of using supersteps to develop parallel software. This paper demonstrates how the cost model can be preserved when developing software for irregular problems, which typically require dynamic load balancing and introduce runtime task dependencies. The solution introduces shared data types within a superstep, which support weakened forms of shared data consistency for scalable performance. An example of a priority queue to support a solution of the travelling salesman problem is given, with predicted and observed performance results provided for 256 processors of a Cray T3D MPP.

Algorithm design and analysis using the WPRAM model

The takeup of parallel computing has been hampered by the lack of portable software. The BSP model allows the design of portable code for regular computations. This paper describes the use of the WPRAM model to support more irregular problems. A shared queue data type is described which provides predictable and scalable performance characteristics. The queue can be used to structure the sharing of data in a parallel system, resulting in code which is portable and amenable to performance analysis.