Jonathan W. Mills

Lukasiewicz logic arrays

Lukasiewicz logic arrays (LLAs) are massively parallel analog computers organized as binary trees of identical processing elements performing either implication, negated implication, or both. The authors have designed and built working 31-cell CMOS VLSI LLA whose cells perform implication. They discuss the representation completeness of Lukasiewicz logic with respect to other multiple-valued logics; describe the architecture of the prototype LLA, its relationship to cellular automata and its VLSI implementation; show how the prototype LLA is programmed; and report on results obtained by programming the prototype LLA as a fuzzy function generator. Because LLAs have both an algebraic and a logical operational semantics, they can be used to implement approximate reasoning systems, including expert systems and neural networks.<<ETX>>

Area-efficient implication circuits for very dense Lukasiewicz logic arrays

A one-diode circuit for negated implication is derived from a 12-transistor Lukasiewicz implication circuit. The derivation also yields an adjustable three-transistor implication circuit with maximum error less than 1% of full scale. Two Lukasiewicz logic arrays are proposed that use area-efficient implementations of the one-diode and three-transistor implication circuits. The very dense diode-tower LLA contains 36000 implications in an area that previously held 92 implications; the three-transistor LLA contains 1990 implications. Both LLAs double the number of inputs per pin on the IC package. Very dense LLAs make LLA-based architectures practical. As an example, an LLA retina that detects edges in 15 ns is described.<<ETX>>

CMOS VLSI Lukasiewicz logic arrays

Lukasiewicz logic arrays (LLAs) are massively parallel analog computers organized as binary trees of identical processing elements. The authors have designed and performed preliminary tests on a series of CMOS VLSI LLAs whose cells perform Lukasiewicz implication ( to ). The authors describe the LLA architecture and its relationship to cellular automata, describe the CMOS VLSI implementation of versions LL9 and LL10 and their initial characterization, and report on the results obtained by programming LL9 and LL10 as fuzzy function recognizers, the first step in designing more general function units such as expert systems and neural networks. Initial test results showed that the LLAs implemented the notch function linearly, but with a slope that varied from that of the ideal function. Trimming the LLA inputs and outputs is expected to result in a typical error of less than 2%, and a mean error of less than 0.5%.<<ETX>>

Lukasiewicz' insect: the role of continuous-valued logic in a mobile robot's sensors, control, and locomotion

The ability to physically realize a colony of insect-like robots presents numerous problems. A hexapod robot controlled by a computational sensor is proposed as a solution to some of these problems. Stiquito is a small nitinol-propelled robot. It is controlled by a computational sensor implemented with Lukasiewicz logic arrays (LLAs). The computational sensor includes an electronic retina, an implicit controller, and a gait generator. Measured and simulated results illustrate the unifying effect of Lukasiewicz logic on the design of the robotic system.<<ETX>>

An analog VLSI array processor for classical and connectionist AI

The authors describe the architecture of an operational 31-cell CMOS VLSI Lukasiewicz logic array (LLA) which is regular, simple, area-efficient, and implemented with analog rather than digital processing elements. The prototype LLAs are programmed with input vectors derived from normal forms of sentences in the Lukasiewicz logic. This requires data inputs on the order of O(2/sup n/) for sentences in n implications, limits the size of the sentences that can be evaluated by a given LLA, and increases the number of pins needed on the VLSI package. The dual logic and algebraic semantics of Lukasiewicz logic allows LLAs to implement expert systems, neural networks and fuzzy logic functions. Schematic examples are given for each application, and results obtained by programming the prototype LLA as a fuzzy function generator show that the LLA implemented the notch function linearly, but with a slope that varied from that of the calculated function.<<ETX>>

A pipelined architecture for logic programming with a complex but single-cycle instruction set

An architecture that executes logic programs using fewer instruction cycles than hardware implementations of the Warren Abstract Machine or the Berkeley SPUR augmented with a Prolog coprocessor is described. This is achieved by balancing the characteristics of CISC (complex instruction set computer) and RISC (reduced instruction set computer) architectures. Specifically, this architecture provides support for the semantics of logic programs using complex instructions and multiple pipelined functional units. Examples of complex instructions include partial unify, push and load reference, pop and deference, and switch on type; all typically execute in a single clock cycle from a full pipeline. Conditional instruction execution reduces a branch frequency to 0.09%, which keeps the pipeline full and allows 16-way memory interleaving. Under these conditions, one LIBRA processor using 100 ns memory is estimated to execute nine million logical inferences per second.<<ETX>>

Evolving Letter Recognition with an Extended Analog Computer

Image recognition is a challenging problem facing researchers today. Much of image recognition is done with a digital computer, where computations are performed in series. Analog computers compute naturally in parallel and are able to solve some image recognition problems nearly instantaneously. In this research, we evolve digital Lukasiewicz logic arrays to work with a general purpose extended analog computer and a photosensitive array to accurately identify letters of the alphabet.

Awakening the Analogue Computer: Rubel's Extended Analog Computer Workshop

Shannons General Purpose Analog Computer (GPAC) was unable to directly solve many problems that Lee A. Rubel believed were critical to implement the functions of the human brain. In response Rubel defined the Extended Analog Computer (EAC) in 1993, which was able to directly compute partial differential equations, solve the inverse of functions and implement spatial continuity, among other operations.