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Dive into the research topics where Jong-Hyeok Jeon is active.

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Featured researches published by Jong-Hyeok Jeon.


international microwave symposium | 2004

High-Q integrated 3-D inductors and transformers for high frequency applications

Dae-Hee Weon; Jong-Hyeok Jeon; Jeong-Il Kim; Saeed Mohammadi; Linda P. B. Katehi

Using a novel 3-D fabrication technology, we have demonstrated, for the first time, very high frequency and high quality factor (Q) inductors and transformers on Si substrate. On high resistivity Si, this technology achieves a quality factor of Q>60 for 1nH inductor at frequencies of 3 to 7 GHz. High efficiency high-Q transformers with coupling factors 0.6<k<0.9 are achieved with very high self-resonance frequencies (8 GHz<f/sub res/<16 GHz). This technology is very simple and is fully compatible with Si and compound-semiconductor fabrication technologies and can be either implemented as a post-processing step or as a part of a vertical chip to inter poser packaging scheme.


international microwave symposium | 2005

High performance micro-machined inductors on CMOS substrate

Dae-Hee Weon; Jeong-Il Kim; Jong-Hyeok Jeon; Saeed Mohammadi; Linda P. B. Katehi

Using a combination of micromachining and three-dimensional (3-D) processing technologies, we have designed, fabricated, and tested inductors on CMOS grade Si substrate (10/spl sim/20 /spl Omega/-cm resistivity) which exhibit very high quality factor and high resonant frequency. A 1.2 nH inductor in this process achieves a record high quality factor of /spl sim/140 at 12GHz, with Q > 100 for frequencies between 8 to 20GHz. The technology to fabricate these inductors is based on one step deposition and electroplating of a stressed layered metal combination of Cr and Au and is fully compatible with CMOS technology.


Journal of Vacuum Science & Technology B | 2007

High-Q micromachined three-dimensional integrated inductors for high-frequency applications

Dae-Hee Weon; Jong-Hyeok Jeon; Saeed Mohammadi

Three-dimensional micromachined inductors are fabricated on high-resistivity (10kΩcm) and low-resistivity (10Ωcm) Si substrates using a stressed metal technology. On high-resistivity Si substrate with low-k dielectric material (SU-8™), this technology achieves a quality factor Q of 75 for a 1nH inductor at frequencies around 4GHz and a self-resonant frequency fsr above 20GHz. Using Si bulk micromachining to etch away the low-resistivity Si substrate with a combination of deep reactive ion etching and tetramethyl ammonium hydroxide etching methods, a 1.2nH inductor achieves a peak quality factor Q of 140 at a frequency of 12GHz with a self-resonant frequency fsr above 40GHz. The dependence of high-frequency performance on the inductor’s variables, such as the number of turns, turn-to-turn gap, and substrate type, has been investigated. Excellent performance is achieved by removing the substrate due to the complete elimination of substrate losses and the reduction of the parasitic capacitance. This technolo...


european microwave conference | 2003

High-Q differential inductors for RFIC design

Michael T. Reiha; Tae-Young Choi; Jong-Hyeok Jeon; Saeed Mohammadi; Linda P. B. Katehi

The demand for high-Q on-chip monolithic inductors is driven by the motivation to enhance high-frequnecy circuits for wireless applications. Differential inductors can be implemented in order to improve the quality factor (Q) of differential circuits, while demanding less on-chip area. In this paper, we introduce two differential inductors of 6-nH, fabricated in a low-cost post-process. The process uses a low-k dielectric layer (SU-8¿) prepared on a highly resistive silicon-on-insulator (SOI) wafer. The inductors have modest metal thicknesses of 1.5um and 3.6um and achieve differential Q values of 14.7 at 5.9GHz and 22.7 at 4.0GHz, respectively, for an inductance value of 6.0nH.


european microwave conference | 2003

The effect of low-k dielectrics on RFIC inductors

Jong-Hyeok Jeon; Emigdio J. Inigo; Michael T. Reiha; Tae-Young Choi; Yongshik Lee; Saeed Mohammadi; Linda P. B. Katehi

This paper presents design, fabrication, and optimization of high quality factor (Q) inductors on low dielectric polymers implemented on a high resistivity silicon substrate. Both Benzocyclobutene (BCB) and SU-8¿ dielectrics were used as low dielectric material. A maximum Q > 20 at 8GHz was measured for a 2.5nH inductor on SU-8¿ deposited on high resistivity Si.


international microwave symposium | 2005

Design of toroidal inductors using stressed metal technology

Jeong-Il Kim; Dae-Hee Weon; Jong-Hyeok Jeon; Saeed Mohammadi; Linda P. B. Katehi

This paper presents design, fabrication and characterization of three-dimensional (3-D) toroidal inductors using a stressed metal technology developed at Purdue University. The fabricated 31-turn toroidal inductor on high-resistivity silicon substrate shows inductance value of 25.4 nH and peak quality factor of 14.2. Because of the arc deployment of inductor turns, it is found that a sufficiently narrow turn-to-turn gap is essential to achieve high inductance value. In addition, it is found that, even for toroidal inductors, the substrate effects are the dominant loss mechanism at high frequencies and should be suppressed in order to obtain high values of the quality factor.


Journal of Vacuum Science & Technology B | 2008

Molecular beam epitaxy growth of InAs and In0.8Ga0.2As channel materials on GaAs substrate for metal oxide semiconductor field effect transistor applications

Ning Li; Eric S. Harmon; David B. Salzman; Dmitri N. Zakharov; Jong-Hyeok Jeon; Eric A. Stach; J. M. Woodall; Xufeng Wang; T. P. Ma; Fred Walker

InAs and high indium concentration InGaAs have very high electron mobilities and saturation velocities. Using them as the metal oxide semiconductor field effect transistor (MOSFET) channel materials is a very promising way to keep improving the integrated circuit chip performance beyond Moore’s law. One major obstacle is the growth of these high mobility channel materials on lattice-mismatched substratcs. In this work, we studied the molecular beam epitaxy growth of InAs, In0.8Al0.2As, and In0.8Ga0.2As on lattice-mismatched GaAs substrate using a thin indium-rich InAs wetting layer. Reflection high energy electron diffraction and atomic force microscopy were used to optimize the growth conditions. A surface roughness of ∼0.5nm rms was obtained for InAs layers. A new MOSFET structure with In0.8Ga0.2As channel and In0.8Al0.2As buffer layer was also demonstrated. High mobility depletion mode MOSFET characteristics were demonstrated.


Archive | 2007

Power generation from solid aluminum

J. M. Woodall; Eric S. Harmon; Kurt C. Koehler; Jeffrey T. Ziebarth; Charles R. Allen; Yuan Zheng; Jong-Hyeok Jeon; George H. Goble; David B. Salzman


Solar Energy Materials and Solar Cells | 2010

Simulation assisted design of a gallium phosphide n-p photovoltaic junction

Charles R. Allen; Jong-Hyeok Jeon; J. M. Woodall


Solar Energy Materials and Solar Cells | 2011

Results of a gallium phosphide photovoltaic junction with an AR coating under concentration of natural sunlight

Charles R. Allen; J. M. Woodall; Jong-Hyeok Jeon

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J. M. Woodall

University of California

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