Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Jose M. Ortiz-Rodriguez is active.

Publication


Featured researches published by Jose M. Ortiz-Rodriguez.


ieee industry applications society annual meeting | 2006

Recent Advances in High-Voltage, High-Frequency Silicon-Carbide Power Devices

Allen R. Hefner; Sei-Hyung Ryu; Brett Hull; David W. Berning; Colleen E. Hood; Jose M. Ortiz-Rodriguez; Angel Rivera-Lopez; Tam H. Duong; Adwoa Akuffo; Madelaine Hernandez-Mora

The emergence of high-voltage, high-frequency (HV-HF) silicon-carbide (SiC) power devices is expected to revolutionize commercial and military power distribution and conversion systems. The DARPA wide bandgap semiconductor technology (WEST) high power electronics (HPE) program is spearheading the development of HV-HF SiC power semiconductor technology. In this paper, some of the recent advances in development of HV-HF devices by the HPE program are presented and the circuit performance enabled by these devices is discussed


ieee industry applications society annual meeting | 2008

High-Voltage Isolated Gate Drive Circuit for 10 kV, 100 A SiC MOSFET/JBS Power Modules

David W. Berning; Tam H. Duong; Jose M. Ortiz-Rodriguez; Angel Rivera-Lopez; Allen R. Hefner

A high-current, high-voltage-isolated gate drive circuit developed for characterization of high-voltage, high- frequency 10 kV, 100 A SiC MOSFET/JBS half-bridge power modules is presented and described. Gate driver characterization and simulation demonstrate that the circuit satisfies the gate drive requirements for the SiC power modules in applications such as the DARPA WBST-HPE solid state power substation (SSPS). These requirements include 30 kV voltage-isolation for the high-side MOSFETs, very low capacitance between the ground and floating driver sides, and 20 kHz operation. Block diagram and detailed discussion of principles of operation of the gate drive circuit are given, together with measured and simulated waveforms of performance evaluation.


applied power electronics conference | 2011

Comparison of 4.5 kV SiC JBS and Si PiN diodes for 4.5 kV Si IGBT anti-parallel diode applications

Tam H. Duong; Allen R. Hefner; Karl D. Hobart; Sei-Hyung Ryu; David Grider; David W. Berning; Jose M. Ortiz-Rodriguez; Eugene A. Imhoff; Jerry Sherbondy

A new 60 A, 4.5 kV SiC JBS diode is presented, and its performance is compared to a Si PiN diode used as the antiparallel diode for 4.5 kV Si IGBTs. The I-V, C-V, reverse recovery, and reverse leakage characteristics of both diode types are measured. The devices are also characterized as the anti-parallel diode for a 4.5 kV Si IGBT using a recently developed high-voltage, double-pulse switching test system. The results indicate that SiC JBS diodes reduce IGBT turn-on switching loses by about a factor of three in practical applications. Furthermore, the peak IGBT current at turn-on is typically reduced by a factor of six, resulting in substantially lower IGBT stress. Circuit simulator models for the 4.5 kV SiC JBS and Si PiN diodes are also developed and compared with measurements.


IEEE Transactions on Power Electronics | 2015

3-D Thermal Component Model for Electrothermal Analysis of Multichip Power Modules With Experimental Validation

John Reichl; Jose M. Ortiz-Rodriguez; Allen R. Hefner; Jih-Sheng Lai

This paper presents for the first time a full three-dimensional (3-D), multilayer, and multichip thermal component model, based on finite differences, with asymmetrical power distributions for dynamic electrothermal simulation. Finite difference methods (FDMs) are used to solve the heat conduction equation in three dimensions. The thermal component model is parameterized in terms of structural and material properties so it can be readily used to develop a library of component models for any available power module. The FDM model is validated with a full analytical Fourier series-based model in two dimensions. Finally, the FDM thermal model is compared against measured data acquired from a newly developed high-speed transient coupling measurement technique. By using the device threshold voltage as a time-dependent temperature-sensitive parameter (TSP), the thermal transient of a single device, along with the thermal coupling effect among nearby devices sharing common direct bond copper (DBC) substrates, can be studied under a variety of pulsed power conditions.


power electronics specialists conference | 2007

High-Voltage, High-Frequency SiC Power MOSFETs Model Validation

Jose M. Ortiz-Rodriguez; T. H. Duong; A. Rivera-Lopez; Allen R. Hefner

Circuit simulator model validation procedures and results are presented for SiC power MOSFETs. The characteristics discussed include on-state conduction, resistive load switching, inductive load switching, and high voltage depletion capacitance. The validation procedures are performed using a script written in the AIM language that is incorporated in the Saberreg* circuit simulator. The script uses the model parameter sets from the IGBT Model Parameter ExtrACTion (IMPACT) tools to perform simulations and then compares the simulated results with measured characteristics. Example validation results are presented for recently developed 5 A, 10 kV SiC power MOSFETs demonstrating for the first time the model performance at the full application switching voltage (5 kV for the 10 kV devices).


ieee industry applications society annual meeting | 2006

Generalized Test Bed for High-Voltage, High-Power SiC Device Characterization

David W. Berning; Allen R. Hefner; Jose M. Ortiz-Rodriguez; Colleen E. Hood; Angel Rivera

A generalized 25 kV test bed developed to characterize high-voltage, high-power SiC devices is described. The test bed provides a high-speed (30 mus), high-voltage linear amplifier that is used as the pulsed power supply for parametric static measurements (curve tracer) and as the continuous high voltage power supply for inductive/resistive switching measurements. The test bed includes high-voltage inductors, clamping capacitors, and load modules for resistive and inductive load switching. An additional reconfigurable section of the test bed with plug-in current limiting and current sense resistors is used for parametric (curve tracer) device characterization. A flexible curve tracer software-based user interface is used to control several power supply and measurement instruments that collectively comprise a versatile pulsed curve tracer. The device under test (DUT) is mounted on a 20 kV electrically-isolated temperature-controlled heatsink. The test bed features containment of all high voltage circuits and the DUT within a clear plastic interlocked safety box. Several example measurements of SiC devices using the test bed are shown


applied power electronics conference | 2008

Circuit simulation model for a 100 A, 10 kV half-bridge SiC MOSFET/JBS power module

Tam H. Duong; A. Rivera-Lopez; Allen R. Hefner; Jose M. Ortiz-Rodriguez

This paper presents the simulation of a 100 A, 10 kV silicon carbide (SiC) half-bridge power module operating at 20 kHz in a behavioral boost converter circuit. In the half-bridge power module, 10 kV SiC power MOSFETs are used as the upper and lower switches, where 10 kV SiC junction barrier Schottky (JBS) anti-parallel diodes along with 100 V silicon JBS series reverse-blocking diodes are used to protect the SiC MOSFETs from reverse conduction. The behavioral boost converter is designed to operate a single power switch and a single power diode for continuous 20 kHz hard switching conditions at 5 kV and 100 A. The test circuit contains the model for the 100 A, 10 kV SiC half-bridge power module where the upper MOSFET gate is turned off. The simulated waveforms demonstrate fast switch performance (<100 ns) with minimal turn-on current spikes resulting from charging the capacitances of the other MOSFET and JBS diodes in the module. The results also indicate that the combination of the 10 kV SiC JBS anti-parallel diode with the series low-voltage silicon JBS reverse-blocking diode is effective in protecting the SiC MOSFETs from reverse conduction.


power electronics specialists conference | 2008

Electro-thermal simulation of a 100 A, 10 kV half-bridge SiC MOSFET/JBS power module

T. H. Duong; Jose M. Ortiz-Rodriguez; R. N. Raju; Allen R. Hefner

This paper presents the results from a parametric simulation study that was conducted to optimize the performance of 100 A, 10 kV, 20 kHz half-bridge SiC MOSFET/JBS power modules. The power modules are being developed by the DARPA WBGS-HPE Phase II program and will be used in the 13.8 kV, 2.75 MVA SSPS developed in the HPE Phase III program. The simulations are performed using recently developed and validated physics-based electrical and thermal models. The total device active areas and the various gate resistances and inductances are optimized in order to minimize overall power dissipation. A detailed description of the loss mechanisms and the simulation results for a representative SSPS topology is also presented.


power electronics specialists conference | 2007

Experimental Evaluation of SiC PiN Diode Forward Bias Degradation and Long Term Stability

Madelaine Hernandez-Mora; Adwoa Akuffo; Colleen E. Hood; Jose M. Ortiz-Rodriguez; Allen R. Hefner

New automated measurement systems and test procedures are presented that enable the evaluation of long-term stability of SiC PiN diodes. Long-term stability results are presented for 10 kV SiC PiN diodes that are made using a new fabrication technology developed to eliminate the source of the degradation. The major objectives of the long-term stability test procedures are to monitor the forward on-state voltage degradation and current area reduction for different forward bias stress levels. Three experimental systems have been used to perform the long-term stability study. Results show that it is possible for SiC diodes to perform acceptably after over 2000 hours of forward bias stress time.


workshop on control and modeling for power electronics | 2013

High speed thermal coupling measurements for multichip electro-thermal model validation

John Reichl; Jose M. Ortiz-Rodriguez; Allen R. Hefner; Madelaine Hernandez; Jih-Sheng Lai

A previously developed measurement method suitable for extracting transient thermal data for short term (100us-1s), high power, heating conditions was used to validate electro thermal models of multichip modules containing IGBTs in [1]. This work extends this technique for validation of thermal coupling behavior within multichip modules containing both IGBTs and MOSFETs for soft switching inverter topologies. By using the device threshold voltage as a time dependent temperature sensitive parameter (TSP), the thermal transient of a single device, along with the thermal coupling effect among nearby devices sharing common direct bond copper (DBC) substrates, can be studied under a variety of pulsed power conditions. Heating transients are made independently to a single device and the TSP of neighboring devices is monitored to determine if thermal coupling exists. The previously developed electro-thermal model in [9] has been modified to include chip to chip coupling effects and validated using the new double TSP method.

Collaboration


Dive into the Jose M. Ortiz-Rodriguez's collaboration.

Top Co-Authors

Avatar

Allen R. Hefner

National Institute of Standards and Technology

View shared research outputs
Top Co-Authors

Avatar

David W. Berning

National Institute of Standards and Technology

View shared research outputs
Top Co-Authors

Avatar

Colleen E. Hood

National Institute of Standards and Technology

View shared research outputs
Top Co-Authors

Avatar

Tam H. Duong

National Institute of Standards and Technology

View shared research outputs
Top Co-Authors

Avatar

Adwoa Akuffo

National Institute of Standards and Technology

View shared research outputs
Top Co-Authors

Avatar

Angel Rivera-Lopez

National Institute of Standards and Technology

View shared research outputs
Top Co-Authors

Avatar

Madelaine Hernandez-Mora

National Institute of Standards and Technology

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Eugene A. Imhoff

United States Naval Research Laboratory

View shared research outputs
Top Co-Authors

Avatar
Researchain Logo
Decentralizing Knowledge