Josep Altet
Polytechnic University of Catalonia
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Publication
Featured researches published by Josep Altet.
Proceedings of the IEEE | 2006
Josep Altet; W. Claeys; Stefan Dilhaire; Antonio J. Rubio
Measuring techniques of the die surface temperature in integrated circuits are reported as very appropriate for failure analysis, for thermal characterization, and for testing modern devices. The paper is arranged as a survey of techniques oriented towards measuring the temperature dynamics of the circuit surface and presenting and discussing both the merits and drawbacks of each technique with regard to the accuracy, reliability and efficiency of the measurements. Two methods are presented in detail: laser probing methods, based on interferometry and thermoreflectance, and embedded CMOS circuit sensors. For these techniques, the physical principles, the state of the art in figures of merit and some application examples are presented
Microelectronics Journal | 2002
Josep Altet; Stefan Dilhaire; Sebastian Volz; Jean-Michel Rampnoux; Antonio J. Rubio; Stéphane Grauby; Luis David Patino Lopez; W. Claeys; Jean-Bernard Saulnier
Silicon die surface temperature can be used to monitor the health state of digital and analogue integrated circuits (IC). In the present paper, four different sensing techniques: scanning thermal microscope, laser reflectometer, laser interferometer and electronic built-in differential temperature sensors are used to measure the temperature at the surface of the same IC containing heat sources (hot spots) that behave as faulty digital gates. The goal of the paper is to describe the techniques as well as to present the performances of these sensing methods for the detection and localisation of hot spots in an IC.
IEEE Transactions on Circuits and Systems | 2011
Marvin Onabajo; Josep Altet; Eduardo Aldrete-Vidrio; Diego Mateo; Jose Silva-Martinez
The focus in this paper is on the extraction of RF circuit performance characteristics from the dc output of an on-chip temperature sensor. Any RF input signal can be applied to excite the circuit under examination because only dissipated power levels are measured, which makes this approach attractive for online thermal monitoring and built-in test scenarios. A fully differential sensor topology is introduced that has been specifically designed for the proposed method by constructing it with a wide dynamic range, programmable sensitivity to dc, and RF power dissipation, as well as compatibility with CMOS technology. This paper also presents an outline of a procedure to model the local electrothermal coupling between heat sources and the sensor, which is used to define the temperature sensors specifications as well as to predict the thermal signature of the circuit under test. A prototype chip with an RF amplifier and temperature sensor was fabricated in a conventional 0.18-μm CMOS technology. The proposed concepts were validated by correlating RF measurements at 1 GHz with the measured dc voltage output of the on-chip sensor and the simulation results, demonstrating that the RF power dissipation can be monitored and the 1-dB compression point can be estimated with less than 1-dB error. The sensor circuitry occupies a die area of 0.012 mm2, which can be shared when several on-chip locations are observed by placement of multiple temperature-sensing parasitic bipolar devices.
Measurement Science and Technology | 2010
Eduardo Aldrete-Vidrio; Diego Mateo; Josep Altet; M. Amine Salhi; Stéphane Grauby; Stefan Dilhaire; Marvin Onabajo; Jose Silva-Martinez
This paper presents two approaches to characterize RF circuits with built-in differential temperature measurements, namely the homodyne and heterodyne methods. Both non-invasive methods are analyzed theoretically and discussed with regard to the respective trade-offs associated with practical off-chip methodologies as well as on-chip measurement scenarios. Strategies are defined to extract the center frequency and 1 dB compression point of a narrow-band LNA operating around 1 GHz. The proposed techniques are experimentally demonstrated using a compact and efficient on-chip temperature sensor for built-in test purposes that has a power consumption of 15 μW and a layout area of 0.005 mm 2 in a 0.25 μm CMOS technology. Validating results from off-chip interferometer-based temperature measurements and conventional electrical characterization results are compared with the on-chip measurements, showing the capability of the techniques to estimate the center frequency and 1 dB compression point of the LNA with errors of approximately 6% and 0.5 dB, respectively.
vlsi test symposium | 2013
Louay Abdallah; Haralampos-G. D. Stratigopoulos; Salvador Mir; Josep Altet
We present a built-in, defect-oriented test approach for RF circuits that is based on thermal monitoring. A defect will change the power dissipation of the circuit under test from its expected range of values which, in turn, will induce a change in the expected temperature in the substrate near the circuit. Thus, an on-chip temperature sensor that monitors the temperature near the circuit can reveal the existence of the defect. This test approach has the key advantage of being non-intrusive and transparent to the design since the temperature sensor is not electrically connected to the circuit. We discuss the basics of thermal monitoring, the design of the temperature sensor, as well as the test scheme. The technique is demonstrated on fabricated chips where a temperature sensor is employed to monitor an RF low noise amplifier.
international on-line testing symposium | 2001
Ashish Syal; Victor Lee; I. Andre; Josep Altet
This paper treats the test of CMOS digital ICs by using the thermal mapping of the silicon surface as a test observable. Two different temperature-sensing strategies are presented. The novel sensors developed are an on-chip CMOS Differential Temperature (DT) sensor and a Proportional to Absolute Temperature (PTAT) sensor. The sensors have been implemented in a standard .18 μm CMOS technology.
IEEE Transactions on Components and Packaging Technologies | 2007
Eduardo Aldrete-Vidrio; Diego Mateo; Josep Altet
Four differential temperature sensors, two passive and two active, designed and fabricated in a 0.35-m standard CMOS technology, are presented and characterized. Passive sensors are based on integrated thermopiles. Each one consists of eight thermocouples (16 strips) serially connected: poly1-poly2 for the first thermopile and poly1-P+diffusion for the second one. The active sensors are based on differential amplifiers, one with single-ended output and the other with differential output. Lateral parasitic bipolar transistors are used as temperature transducer devices. Both simulated and experimental characterizations are presented. The high sensitivity of active differential temperature sensors proves the feasibility of such sensors to observe the power dissipated by devices and circuits embedded in the same silicon die, with applications to the test and characterization of circuits, packaging characterization and compensation of thermal gradients, among others.
vlsi test symposium | 2004
Josep Altet; Antonio J. Rubio; M. Amine Salhi; J. L. Gálvez; Stefan Dilhaire; Ashish Syal; André Ivanov
Temperature is a physical magnitude that can be used as an observable quantity for IC testing purposes. The authors discuss in this paper the suitability of two temperature measuring strategies applicable to standard CMOS integrated circuits: a laser interferometer and a differential fully CMOS built-in temperature sensor.
Measurement Science and Technology | 2008
Josep Altet; Eduardo Aldrete-Vidrio; Diego Mateo; X. Perpiñà; Xavier Jordà; Miquel Vellvehi; J. Millan; A. Salhi; Stéphane Grauby; W. Claeys; Stefan Dilhaire
The observation of spectral components of the power dissipated by devices and circuits in integrated circuits (IC) by temperature measurements is limited by the bandwidth of either the temperature transducer or the intrinsic cut-off frequency provided by the thermal coupling inside the chip. In this paper, we use a heterodyne method to observe the high-frequency behavior of circuits and devices by means of low-frequency lock-in temperature measurements. As experimental results, two applications of the technique are presented: detection of hot spots in ICs activated by high-frequency electrical signals and the observation of the frequency response of an integrated resistor through temperature measurements. The heterodyne method has been used in this paper with four different measurement techniques: embedded differential BiCMOS temperature sensor, laser reflectometer, laser interferometer and internal IR laser deflection meter.
Journal of Physics D | 2008
X. Perpiñà; Xavier Jordà; Miquel Vellvehi; Josep Altet; Narcis Mestres
A new approach is reported for thermally characterizing microelectronic devices and integrated circuits under a steady-state sinusoidal regime by internal infrared-laser deflection (IIR-LD). It consists of extracting the amplitude and phase Bode plots of the temperature profile inside the chip (depth-resolved measurements in the frequency domain). As a consequence, not only are the IIR-LD performances significantly improved (accuracy, robustness to noise, control of boundary conditions and heat flux confinement) but also the direct temperature measurement is feasible when thin regions are inspected and thermal parameters can be easily extracted (thermal diffusivity). In order to show the efficiency of this technique, a thermal test chip (TTC) is used. The TTC is thermally excited by imposing a cosine-like voltage waveform. As a result, a vertical temperature profile inside the die is obtained depending on the heating frequency. Repeating this procedure at several frequencies, the frequency response of the chip internal temperature profile is derived. By comparing the experimental results with the model predictions, good agreement is achieved. This technique allows evaluation of the thermal behaviour at the chip level; also it could be useful for failure analysis.