Joseph M. Palmer

A Parallel FFT Architecture for FPGAs

The inclusion of block RAMs and block multipliers in FPGA fabrics has made them more ammenable for implementing the FFT. This paper describes a parallel FFT design suitable for such FPGA implementations. It consists of multiple, parallel pipelines with a front end butterfly-like circuit to preprocess the incoming data and distribute it to the parallel pipelines. Implementation of the parallel FFT on Virtex II shows superlinear speedups for a range of FFT sizes.

An FPGA-based Space-time coded telemetry receiver

The significant problem of data dropouts in aeronautical telemetry due to multiple transmit antennas has escalated as transmit data rates have increased. A proposed solution of using a space-time coded signal can resolve these data dropouts at the expense of increased receiver complexity. This paper describes an implementation overview of an FPGA-based space-time coded telemetry receiver and the various challenges associated with its realization. In addition, we discuss the productivity of the high-level design tool used in constructing the receiver, Xilinx system generator for DSP. With some overhead in terms of FPGA fabric usage and clock speed, our estimates show a 2 - 3x productivity improvement over standard HDLs.

Space-Time Coding for Aeronautical Telemetry: Part II—Decoder and System Performance

This paper describes the use of Alamouti-encoded-shaped offset QPSK version TG (SOQPSK-TG) to solve the two-antenna problem in aeronautical telemetry. The Alamouti space-time block code is used to encode the phase states in the complex exponential representation of SOQPSK-TG. Because SOQPSK-TG possesses memory, the Alamouti decoder is a sequence estimator. Maximum likelihood and least squares sequence decoders are derived. To reduce the number of states, the eight-waveform cross-correlated trellis-coded quadrature modulation (XTCQM) approximate representation of SOQPSK-TG is used. A prototype decoder based on the least squares decoder and the estimators described in Part I and operating at a data rate of 10 Mb/s was tested in the laboratory in test flights at the Air Force Test Center, Edwards AFB. The test flights demonstrate that Alamouti-encoded SOQPSK-TG, as described in this paper, using the least squares decoder based on the estimators described in Part I solves the two antenna problem in aeronautical telemetry.

Space-Time Coding for Aeronautical Telemetry: Part I—Estimators

This paper derives and analyzes the estimators required for detection and decoding of Alamouti-encoded-shaped offset QPSK version TG (SOQPSK-TG). The joint maximum likelihood (ML) estimators for the frequency offset, channel delays, and channel gains are derived and analyzed. As a complexity-reducing technique, a sequential version of the ML estimators is developed. The Cramér–Rao bound for the parameters is derived and used to analyze the performance of the estimators to determine pilot sequence length. The complexity of the frequency estimator is reduced by applying the Zoom FFT algorithm in the coarse search. The complexity of the channel delay estimator was reduced by developing a novel version of the simplex search algorithm that operated on a discrete two-dimensional grid. These estimation algorithms were implemented in a prototype demodulator that was field tested at Edwards AFB.

Frequency Estimation Using Multiple Disjoint Pilot Blocks in Burst-Mode Communications

A practical data-aided frequency estimator, suitable for use in burst-mode communications, is described and analyzed. The estimator is based on pilot symbols organized into disjoint blocks embedded in the burst, and it is a generalization of the autocorrelation frequency estimation technique. The generalizations are needed to account for the spacings between the pilot blocks. It is shown that the frequency estimator exhibits good accuracy while maintaining useful operating ranges.

A Low-Variance and Low-Complexity Carrier-Frequency-Offset Estimator using Multiple Pilot Sequences

A data-aided carrier frequency offset estimator is proposed. The proposed estimator is novel because it operates on multiple pilot sequences, spaced in time. Various papers have been presented which prove the estimation performance advantages of using such a scheme. However, little work has been presented on practical estimators which achieve these improved bounds. The new estimator is based on the family of phase-increment frequency estimator methods. Hence, it is low-complexity, as well as highly accurate.

The Design of an FPGA-Based MIMO Receiver: Algorithmic and Architectural Interactions

A research team at Brigham Young University is currently developing a high-performance, FPGA-based demodulator for detecting a space-time coded signal. The project timeline required that the algorithm be concurrently developed, to a certain extent, with the hardware implementation. Thus, from the outset both algorithm and hardware implementation researchers worked closely together in contrast to the, all too common, three-step development approach (algorithm development, throw-algorithm-over-wall, hardware implementation). In this paper we outline the unique characteristics of the system and then discuss the interaction between algorithm design and architectural implementation. In particular, we focus on two blocks from the system: the carrier frequency offset estimation block and the pilot detector block and show their evolution from their original mathematical formulations to equivalent but greatly simplified hardware implementations.