Joseph S. Friedman

A Spin-Diode Logic Family

While most modern computing technologies utilize Si complementary metal-oxide-semiconductor (CMOS) transistors and the accompanying CMOS logic family, alternative devices and logic families exhibit significant performance advantages. Though heretofore impractical, diode logic allows for the execution of logic circuits that are faster, smaller, and dissipate less power than conventional architectures. In this paper, magnetoresistive semiconductor heterojunctions are used to produce the first complete logic family based solely on diodes. We utilize the diode magnetoresistance states to create a binary logic family based on high and low currents in which a full range of logic functions is executed. The diode is used as a switch by manipulating its magnetoresistance with current-carrying wires that generate magnetic fields. Using this device structure, we present basis logic elements and complex circuits consisting of as few as 10% of the devices required in their conventional CMOS counterparts. This diode logic family is therefore an intriguing potential replacement for CMOS technology as Si scaling reaches its inherent limits.

Spintronic devices as key elements for energy-efficient neuroinspired architectures

Processing the current deluge of data using conventional CMOS architectures requires a tremendous amount of energy, as it is inefficient for tasks such as data mining, recognition and synthesis. Alternative models of computation based on neuroinspiration can prove much more efficient for these kinds of tasks, but do not map ideally to traditional CMOS. Spintronics, by contrast, can bring features such as embedded nonvolatile memory and stochastic and memristive behavior, which, when associated with CMOS, can be key enablers for neuroinspired computing. In this paper, we explore different works that go in this direction. First, we illustrate how recent developments in embedded nonvolatile memory based on magnetic tunnel junctions (MTJs) can provide the large amount of nonvolatile memory required in neuro-inspired designs while avoiding Von Neumann bottleneck. Second, we show that recently developed spintronic memristors can implement artificial synapses for neuromorphic systems. With a more groundbreaking design, we show how the probabilistic writing of single MTJ bits can efficiently replace multi-level weighting for some classes of neuroinspired architectures. Finally, we show that a special class of MTJs can exhibit the phenomenon of stochastic resonance, a strategy used in biological systems to detect weak signals. These results suggest that the impact of spintronics extends beyond the traditional standalone and embedded memory markets.

Complementary Magnetic Tunnel Junction Logic

This brief proposes and analyzes a novel logic family composed solely of magnetic tunnel junctions (MTJs) to form complimentary pull-up and pull-down networks. This logic family solves the challenge of direct cascading in spintronic logic circuits while also providing non-volatile data storage. The increased logic density possible with complementary MTJs coupled with a charge pulse switching mechanism driven by ferromagnet polarization permits highly efficient logical computation. Furthermore, the presence of non-volatile memory within the logic structure provides a feasible hardware for non-von Neumann computer architectures.

Emitter-coupled spin-transistor logic

The recent invention of magnetoresistive bipolar spin-transistors makes possible the creation of new spintronic logic families. Here we propose the first logic family exploiting these spin-transistors, extending emitter-coupled logic (ECL) to achieve a greater range of basis logic functions. By placing the wire from the output stage of ECL logic elements near spin-transistors in other parts of a circuit, additional basis logic elements can be realized. These new logic elements support greater logic minimization, resulting in enhanced speed, area, and power characteristics. A novel magnetic shielding structure provides this logic family with the crucial ability to cascade logic stages. This logic family achieves a power-delay product 10 to 25 times smaller than conventional ECL, and can therefore be exploited to increase the performance of very high-speed circuits while broadening the range of design choices for a variety of electronic applications.

Emitter-Coupled Spin-Transistor Logic: Cascaded Spintronic Computing Beyond 10 GHz

The cascading of logic gates is a critical challenge for the development of spintronic logic circuits. Here we propose the first logic family exploiting magnetoresistive bipolar spin-transistors to achieve a complete spintronic logic family in which logic gates can be cascaded. This logic family, emitter-coupled spin-transistor logic (ECSTL), is an extension of emitter-coupled logic (ECL) that leverages the advanced features of spintronic devices. The current through the ECL differential amplifier is routed to create a magnetic field that modulates the magnetoamplification of the spin-transistors. This cascading mechanism supplements the voltage cascading available in conventional ECL, providing additional inputs to each logic stage. Each gate therefore has increased logical functionality, leading to logic minimization and compact circuits. No additional current is required to employ this added spintronic switching, resulting in improved speed, area, and power characteristics. This logic family achieves a power-delay product 10-25 times smaller than conventional ECL, inspiring a pathway for high-performance spintronic computing beyond 10 GHz.

InMnAs magnetoresistive spin-diode logic

Electronic computing relies on systematically controlling the flow of electrons to perform logical functions. Various technologies and logic families are used in modern computing, each with its own tradeoffs. In particular, diode logic allows for the execution of logic with many fewer devices than complementary metal-oxide-semiconductor (CMOS) architectures, which implies the potential to be faster, cheaper, and dissipate less power. It has heretofore been impossible to fully utilize diode logic, however, as standard diodes lack the capability of performing signal inversion. Here we create a binary logic family based on high and low current states in which the InMnAs magnetoresistive semiconductor heterojunction diodes implement the first complete logic family based solely on diodes. The diodes are used as switches by manipulating the magnetoresistance with control currents that generate magnetic fields through the junction. With this device structure, we present basis logic elements and complex circuits consisting of as few as 10% of the devices required in their conventional CMOS counterparts. These circuits are evaluated based on InMnAs experimental data, and design techniques are discussed. As Si scaling reaches its inherent limits, this spin-diode logic family is an intriguing potential replacement for CMOS technology due to its material characteristics and compact circuits.

Cascaded spintronic logic with low-dimensional carbon

Remarkable breakthroughs have established the functionality of graphene and carbon nanotube transistors as replacements to silicon in conventional computing structures, and numerous spintronic logic gates have been presented. However, an efficient cascaded logic structure that exploits electron spin has not yet been demonstrated. In this work, we introduce and analyse a cascaded spintronic computing system composed solely of low-dimensional carbon materials. We propose a spintronic switch based on the recent discovery of negative magnetoresistance in graphene nanoribbons, and demonstrate its feasibility through tight-binding calculations of the band structure. Covalently connected carbon nanotubes create magnetic fields through graphene nanoribbons, cascading logic gates through incoherent spintronic switching. The exceptional material properties of carbon materials permit Terahertz operation and two orders of magnitude decrease in power-delay product compared to cutting-edge microprocessors. We hope to inspire the fabrication of these cascaded logic circuits to stimulate a transformative generation of energy-efficient computing.

Bilayer avalanche spin-diode logic

A novel spintronic computing paradigm is proposed and analyzed in which InSb p-n bilayer avalanche spin-diodes are cascaded to efficiently perform complex logic operations. This spin-diode logic family uses control wires to generate magnetic fields that modulate the resistance of the spin-diodes, and currents through these devices control the resistance of cascaded devices. Electromagnetic simulations are performed to demonstrate the cascading mechanism, and guidelines are provided for the development of this innovative computing technology. This cascading scheme permits compact logic circuits with switching speeds determined by electromagnetic wave propagation rather than electron motion, enabling high-performance spintronic computing.

Spin diode network synthesis using functional composition

This paper proposes an algorithm to synthesize combinational circuits based on spin diode logic technology. Spin diode is a magnetoresistive semiconductor heterojunction device which allows for a binary current based logic. The proposed algorithm takes the advantages of the functional composition (FC) approach to obtain fanout free network implementations with the minimum number of spin diodes. Experimental results have shown that the new proposal obtains better results when compared to the state-of-the-art algorithms that focus on traditional CMOS technology adapted to this new approach.

Low-Energy Truly Random Number Generation with Superparamagnetic Tunnel Junctions for Unconventional Computing

Low-energy random number generation is critical for many emerging computing schemes proposed to complement or replace von Neumann architectures. However, current random number generators are always associated with an energy cost that is prohibitive for these computing schemes. In this paper, we introduce random number bit generation based on specific nanodevices: superparamagnetic tunnel junctions. We experimentally demonstrate high quality random bit generation that represents orders-of-magnitude improvements in energy efficiency compared to current solutions. We show that the random generation speed improves with nanodevice scaling, and investigate the impact of temperature, magnetic field and crosstalk. Finally, we show how alternative computing schemes can be implemented using superparamagentic tunnel junctions as random number generators. These results open the way for fabricating efficient hardware computing devices leveraging stochasticity, and highlight a novel use for emerging nanodevices.