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Featured researches published by Joseph Staudinger.


international microwave symposium | 2000

High efficiency CDMA RF power amplifier using dynamic envelope tracking technique

Joseph Staudinger; B. Gilsdorf; David A. Newman; George B. Norris; Gary W. Sadowniczak; Rick Sherman; T. Quach

This work describes a 2-W peak-envelope linear power amplifier based upon the envelope tracking (ET) technique with application to CDMA cellular radio handsets. Both drain voltages of a two stage monolithic GaAs IC are varied with respect to the long term rms value of the modulated signal using a high efficiency Class-S modulator. The modulator is implemented as a single chip silicon IC to supply currents in excess of 1 A. The RF amplifier IC utilizes two AlGaAs/InGaAs heterostructure insulated-gate FET structures which allows single voltage supply operation with state-of-the-art linearity and efficiency performance. When driven by a CDMA O-QPSK signal, the ET amplifier exhibits desired spectral linearity while achieving a remarkable 5/spl times/ improvement in overall efficiency, compared to fixed supply bias, when measured in a reverse link urban based mobile transmitter power profile.


ieee radio and wireless conference | 1999

800 MHz power amplifier using envelope following technique

Joseph Staudinger; B. Gilsdorf; D. Newman; G. Norris; G. Sadowniczak; R. Sherman; T. Quach; V. Wang

This work describes a 2-W peak-envelope linear power amplifier based upon the envelope following (EF) technique. Both drain voltages of a two stage monolithic GaAs IC power amplifier are modulated with respect to the input RF signal using a high efficiency class-S modulator. The class-S modulator is implemented as a silicon IC consisting of a high-speed comparator and driver circuitry to supply currents in excess of 1 A. The RF amplifier IC utilizes two GaAs HEMT devices designed for class A/B operation. An envelope-feedback loop provides equalization of time delay differences between the envelope and RF signal paths as well as amplitude linearization. The resulting transmitter has adequate bandwidth to amplify an IS-136 /spl pi//4 DQPSK signal with required spectral linearity achieving 49% total efficiency at 1-W average output power using a 3.5 volt supply. At 10 dB power back-off, the system efficiency remains above 30%. Targeting low cost portable wireless handsets, the complete amplifier is realized using two integrated circuits with minimal off chip components.


ieee radio and wireless conference | 1998

An examination of several large signal capacitance models to predict GaAs HEMT linear power amplifier performance

Joseph Staudinger; M.C. De Baca; R. Vaitkus

This article examines several methods of modeling the charge/capacitance characteristics of GaAs HEMT devices for use in large signal models applied to the design and simulation of linear power amplifiers. Emphasis is placed on the effect these charge/capacitance models exhibit on the accuracy of the large signal model to predict linear power amplifier characteristics including gain, output power, efficiency, and linearity. Model predictions are contrasted to on-wafer load pull measurements made using a single-tone sinusoid, two-tone sinusoid, and a /spl pi//4 DQPSK stimuli compliant to the NADC standard. The results suggest the description of the devices charge/capacitance characteristics significantly effects large signal model accuracy.


Proceedings of 1997 Wireless Communications Conference | 1997

The importance of sub-harmonic frequency terminations in modeling spectral regrowth from CW am-am and am-pm derived non-linearities

Joseph Staudinger

This paper examines several issues in applying the quadrature modeling technique to predict gain, efficiency, and distortion characteristics of GaAs MESFET rf power amplifiers. This technique relies on representing the power amplifier as a bandpass nonlinearity described by a series expansion of in-phase and quadrature-phase gain transfer functions. It is shown that the order of the series expansion, as well as the selected series basis functions, have a direct influence on model accuracy. Additionally, this method is extended to predict amplifier drain current and efficiency when driven by time varying non-constant (envelope) amplitude signals, e.g., two tone sinusoids and digitally modulated signals. The effects of sub-harmonic frequency terminations occurring near the zeroth spectral zone, such as those due to bias decoupling on the devices drain terminal, are also examined. Generally, they are not considered in deriving the nonlinear transfer functions, and under certain circumstances, exhibit deleterious effects not predicted by this analysis technique.


international microwave symposium | 1989

An ultra wide bandwidth power divider on MMIC operating 4 to 10 GHz

Joseph Staudinger

A circuit topology has been developed to realize power dividers with bandwidths of 2.5:1 or greater on MMIC (monolithic microwave integrated circuits). A three-way divider has been fabricated which achieved 5.8 dB nominal insertion loss and 18-dB isolation from 4 to 10 GHz. This topology consists of lumped-element interconnected networks and is thus ideally suited for MMIC technology. The proposed minimum-element topology favors component values which are easily realizable and thus minimize losses due to low-Q elements.<<ETX>>


international microwave symposium | 2002

A 15 watt PFP GaAs PHEMT MMIC power amplifier for 3G wireless transmitter applications

Joseph Staudinger; R. Sherman; T. Quach; M. Miller; L. Frye

This work describes a wide-bandwidth highly integrated MMIC linear power amplifier implemented with high voltage GaAs PHEMT device technology targeting 3G wireless infrastructure applications. The MMIC amplifier exhibits 34 dB small signal gain, less than 0.5 dB gain variation across the UMTS frequency band centered at 2.14 GHz, and a peak-envelope power in excess of 15 W when biased with a 12 volt supply. Under a 64 traffic channel single carrier W-CDMA signal (test model 1, with a 11 dB peak-to-average signal ratio), the amplifier achieves 2W average output power and 17% power added efficiency at an ACPR of -40 dBc. Under a 9-channel single carrier IS-95 forward-link signal, the amplifier achieves 4 W average power at an efficiency of 25% at an ACPR of -38 dBc. The MMIC amplifier is highly integrated consisting of 3-gain stages, input and interstage matching circuits, and output pre-matching - all contained on the GaAs IC. The use of on-chip pre-matching for the output load line greatly simplifies and reduces off chip component matching elements and their tolerances. To the authors best knowledge, this amplifier represents the highest power and efficiency reported to date for a GaAs PHEMT amplifier realized at this level of integration.


international microwave symposium | 1996

An examination of data based large signal models for wireless amplifiers

Joseph Staudinger; E.Y. Lan; R. Vaitkus; R. Lucero; J. Hallmark

The validity of the assumptions used to construct a data based large signal GaAs MESFET model is examined for wireless RF power amplification. The compliance of measured S-parameter data to model consistency constraints is calculated for a wide region of the devices I-V plane. Strong compliance is observed at the contour integral point and over localized regions of the I-V plane, but not over extended regions which would be traversed by the dynamic load line of a power amplifier operating in gain compression. These effects ate further examined by comparing harmonic balance predictions of the data based model to that of a common analytical large signal GaAs MESFET model and to load pull measurements of power, efficiency, and linearity.


IEEE Control Systems Magazine | 1990

A highly integrated two channel MMIC down converter with gain control

Joseph Staudinger; Warren L. Seely; John M. Golio; B. Beckwith

A complete MMIC (monolithic microwave IC) down converter with variable-gain control has been fabricated. A 6-8-GHz RF input signal is converted using a fixed 10-GHz LO (local oscillator), to a two-channel 2-4-GHz IF. The die is highly integrated, including an RF preamplifier, a double-balanced mixer, an LO amplifier, a power divider, IF amplification, and two voltage-controlled IF amplifiers which provide variable-gain adjustment. Back vias are utilized to establish grounding for both DC and RF. Probe pads are also included for measuring chip-level performance. A circuit description, the design techniques, and measured performance results are presented.<<ETX>>


international microwave symposium | 1992

Fully integrated double balanced MMIC mixer using a star arrangement of diodes for extended IF performance

Joseph Staudinger; Mike Friesen

A double balanced diode mixer with all circuitry contained on a single MMIC (monolithic microwave integrated circuit) die has been designed and fabricated. The mixer consists of four diodes arranged in a star configuration connected to several balun-type structures. The configuration allows extracting the IF (intermediate frequency) signal at a node which is a virtual ground to both LO (local oscillator) and RF signals. Thus, compared to conventional MMIC mixers, a significant improvement in extracting the IF signal to achieve a broad bandwidth performance is possible. On-chip matching circuitry is included between diodes and baluns to enhance performance across a 6-GHz IF bandwidth.<<ETX>>


ieee radio and wireless conference | 1998

Highly efficient linear power amplifier for 3.5 volt NADC cellular applications

Joseph Staudinger; G. Norris; R. Sherman; G. Sadowniczak

A highly efficient linear power amplifier has been developed for North American Digital Cellular (NADC) mobile radio telephones operating with 3.5 volt batteries. The amplifier consists of two cascaded gain stages to achieve 25 dB gain at greater than 1 W output power with a corresponding power added efficiency of 50% at IS-136 specified ACPR linearity levels. The amplifier is realized using GaAs PHEMT devices to provide superior performance in optimizing the efficiency/linearity trade-off for this digital modulation format. Size of the amplifier is minimized by placing most of the circuitry on a single GaAs IC. An exception is the output matching circuitry where high Q lumped elements are selected to minimize loss. The circuit topology is chosen based on a design methodology where a large signal model of the PHEMT device is combined with behavior analysis techniques such that performance of the amplifier is simulated for a /spl pi//4 DQPSK modulated signal. This approach proved successful in sizing the FET devices as well as examining the performance improvements offered in using selected fundamental and harmonic terminations.

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