Juergen Hasch

A Fundamental Frequency 120-GHz SiGe BiCMOS Distance Sensor With Integrated Antenna

This paper describes the first fundamental frequency single-chip transceiver operating at -band. The low-IF monostatic transceiver integrates on a single chip two 120-GHz voltage-controlled oscillators (VCOs), a 120-GHz divide-by-64 chain, two in-phase/quadrature (IQ) receivers with phase-calibration circuitry, a variable gain transmit amplifier, an antenna directional coupler, a patch antenna, bias circuitry, a transmit power detector, and a temperature sensor. A quartz antenna resonator with 6-dBi gain and simulated 50% efficiency is placed directly above the on-chip patch to transmit and receive the 120-GHz signals. The circuit with the above-integrated-circuit antenna occupies an area of 2.2 mm 2.6 mm, consumes 900 mW from 1.2- and 1.8-V supplies, and was wire-bonded in an open-lid 7 mm 7 mm quad-flat no-leads package. Some transceiver performance parameters were characterized on the packaged chip, mounted on an evaluation board, while others, such as receiver noise figure and VCO phase noise at the 120-GHz output were measured on circuit breakouts. The AMOS-varactor VCOs have a typical phase noise of at 1-MHz offset and a tuning range of 115.2-123.9 GHz. The receiver gain and the transmitter output power are each adjustable over a range of 15 dB with a maximum transmitter output power of 3.6 dBm. The receiver IQ phase difference, measured at the IF outputs of the packaged transceiver, is adjustable from 70° to 110°, while the amplitude imbalance remains less than 1 dB. The receiver breakout gain and double-sideband noise figure are 10.5-13 and 10.5-11.5 dB, respectively, with an input compression point of . Several experiments were conducted through the air over distances of up to 2.1 m with a focusing lens placed above the packaged chip.

A Study of SiGe HBT Signal Sources in the 220–330-GHz Range

The paper presents design optimization strategies and a comparison of the performance of SiGe HBT fundamental and push-push Colpitts and Colpitts-Clapp voltage-controlled oscillators (VCOs), with and without doublers and buffers, as possible solutions for efficient milliwatt-level, low-noise signal sources at submillimeter-wave frequencies. The fundamental frequency Colpitts VCO covers a 12% tuning range between 218 and 246 GHz (the highest for SiGe HBTs) with up to -3.6-dBm output power and 0.8% efficiency. The 300-GHz signal source, consisting of a Colpitts-Clapp VCO followed by a buffer amplifier and a doubler, shows -1.7-dBm output power around 290 GHz, -101-dBc/Hz phase noise at 10-MHz offset, 7.5% tuning range, and 0.4% efficiency. Finally, the push-push Colpitts-Clapp VCO exhibits the highest operation frequency, from 309 to 325 GHz, but with reduced efficiency of only 0.07% and 5% tuning range. It was concluded that the differential cascode buffer placed between the VCO and doubler was instrumental in achieving the best phase noise and output power with good efficiency and without compromising tuning range.

A low-cost miniature 120GHz SiP FMCW/CW radar sensor with software linearization

This paper presents an integrated mixed-signal 120GHz FMCW/CW radar chipset in a 0.13μm SiGe BiCMOS technology. It features on-chip MMW built-in-self-test (BIST) circuits, a harmonic transceiver, software linearization (SWL) circuits and a digital interface. This chipset has been tested in a low-cost package, where the antennas are integrated. Above 100GHz, our transceiver has achieved state-ofthe-art integration level and receiver linearity, and DC power consumption.

A 234–261-GHz 55-nm SiGe BiCMOS Signal Source with 5.4–7.2 dBm Output Power, 1.3% DC-to-RF Efficiency, and 1-GHz Divided-Down Output

A 234-261-GHz signal source with record 7.2-dBm output power at 240 GHz and -105 dBc/Hz phase noise at 10-MHz offset is reported. Fabricated in a production 55-nm SiGe BiCMOS process with HBT fT/fMAX of 330/350 GHz, the circuit includes a 120-GHz fundamental frequency VCO with 1.2-V AMOS varactors, a broadband MOS-HBT cascode LO tree driving a divide-by-128 chain, and a doubler with a record drain efficiency of 11.9%. The total power consumption of the signal source is 386 mW resulting in a DC-to-RF efficiency of 1.3%. A detailed discussion of the candidate LO-tree and doubler topologies and of the design methodology, which capitalizes on the MOS-HBT cascode and unique features of the 55-nm SiGe BiCMOS process, is provided.

A Fundamental Frequency 143-152 GHz Radar Transceiver with Built-In Calibration and Self-Test

This paper presents a 143-152 GHz radar transceiver that incorporates several self-test and calibration features to facilitate simple production testing, as well as correction of the analog front-end impairments. The transceiver was designed and fabricated in a production 130-nm SiGe BiCMOS technology and adopts a two channel heterodyne architecture that allows for the use of a low-IF frequency plan. Measurement results, presented both for the transceiver and for standalone circuit breakouts, demonstrate receiver DSB NF of 9-11 dB and transmitter output power of -12 dBm at the antenna port. The power consumption is 800 mW for 1.2 and 1.8 V power supplies.

A 77-GHz active millimeter-wave reflector for FMCW radar

An 18-mW active millimeter-wave reflector fabricated in 45-nm SOI CMOS technology exhibits a peak gain of 20 dB at 77 GHz, a 3-dB bandwidth of 5 GHz from 75.5 to 80.5 GHz, and a 50-Ω noise figure of 7.5–8.5 dB over the same frequency band. It consists of an LNA, a BPSK modulator and two variable gain output stages each driving a separate transmit antenna. The chip occupies 570µm×880µm and is flip-chip mounted on a 7mm×7mm flexible interposer with two transmit and one receive antenna.

A W-band active millimeter-wave tag IC with wake-up function

An active mm-wave tag was manufactured in a 55nm SiGe BiCMOS process and operates in the 74–83GHz band with −62dBm input sensitivity. It features a 28dB gain LNA with 9dB noise figure, a wake-up detector, a BPSK modulator and two variable gain output stages each driving a separate transmit antenna in antiphase. The chip occupies 570μm × 880μm, consumes 25/10.8 mW in active/stand-by mode, and is flip-chip mounted on a 7mm × 7mm flexible interposer with two transmit and one receive antenna.

A 240GHz Synthesizer in 55nm SiGe BiCMOS

A 234-261GHz synthesizer with 2-4.9dBm output power and -105 dBc/Hz phase noise at 10MHz offset is fabricated in a production 55nm SiGe BiCMOS process with 330/350GHz HBT fT/fMAX. The circuit includes a 120GHz fundamental frequency VCO with 1.2V AMOS varactors, a broadband LO tree driving a divide-by- 128 chain and a doubler. The doubler has a maximum output power of 5.5 dBm at 240 GHz and 11.9% efficiency. The total power consumption of the synthesizer is 467 mW from 2.5V, 1.8V and 1.2V supplies.

Contour recognition with a cooperative distributed radar sensor network

Cooperative Radar Sensor Systems operate several radar sensors with independent generation in a distributed network. Evaluating the cross-echo distances (bistatic responses), additional information about the targets contour can be gained, as the locations of further reflection points of the target can be estimated. In this paper, a system model with several single channel stations is introduced, which enables to distinguish between spherical (point scatterers) and planar objects. For this model, the complete signal processing chain to process the bistatic response is presented. Criteria to distinguish between point and planar scatterers are derived from geometrical deliberations. The technique is demonstrated in a measurement setup with an arbitrary waveform generator (AWG) as the signal source for two stations. Results are discussed for varying phase noise parameters. The measurements reveal that the presented method enables contour classification of objects under strict phase noise requirements.