Juha Yli-Kaakinen
Tampere University of Technology
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Featured researches published by Juha Yli-Kaakinen.
international symposium on circuits and systems | 2004
Juha Yli-Kaakinen; Tapio Saramäki
This paper considers optimizing adjustable fractional-delay (FD) all-pass filters in the minimax sense. A filter structure proposed by Makundi, Laakso and Valimaki and referred to as an all-pass gathering structure is employed. The optimization is performed in two basic steps. First, an initial filter is generated using a simple design scheme. Second, this filter is used as a start-up solution for further optimization being carried out by an efficient constrained nonlinear optimization algorithm. An example is included for illustrating the efficiency of the proposed design scheme. In addition, the performance and the complexity of the adjustable FD all-pass filters are compared with those of the adjustable FD finite impulse-response filters implemented using the modified Farrow structure proposed by Vesma and Saramaki. This comparison shows that both the number of multipliers and the number of adders for the resulting all-pass filters are less than 50 percent compared with their optimized FIR counterparts.
Journal of Circuits, Systems, and Computers | 2003
Tapio Saramäki; Juha Yli-Kaakinen; Håkan Johansson
A very efficient technique to drastically reduce the number of multipliers and adders in implementing linear-phase finite-impulse response (FIR) digital filters in applications demanding a narrow transition band is to use the frequency-response masking (FRM) approach originally introduced by Lim. The arithmetic complexity can be even further reduced using a common filter part for constructing the masking filters originally proposed by Lim and Lian. A drawback in the above-mentioned original FRM synthesis techniques is that the subfilters in the overall implementations are separately designed. In order to further reduce the arithmetic complexity in these two FRM approaches, the following two-step optimization technique is proposed for simultaneously optimizing the subfilters. At the first step, a good suboptimal solution is found by using a simple iterative algorithm. At the second step, this solution is then used as a start-up solution for further optimization being carried out by using an efficient unconstrained nonlinear optimization algorithm. An example taken from the literature illustrates that both the number of multipliers and the number of adders for the resulting optimized filter are less than 80% compared with those of the FRM filter obtained using the original FRM design schemes in the case where the masking filters are separately implemented. If a common filter part is used for realizing the masking filters, then an additional reduction of more than 10% is achieved compared with the optimized design with separately implemented masking filters.
international symposium on control, communications and signal processing | 2004
Juha Yli-Kaakinen; Tapio Saramäki; Robert Bregovic
This paper describes an algorithm for designing multiplierless two-channel perfect-reconstruction (PR) orthogonal lattice filter banks. The advantage of the lattice implementation is that the PR property is structurally ensured even after quantizing the coefficients into very simple representation forms. The coefficient optimization is performed in three basic stages. First, a simple design scheme is used for generating an initial solution for further optimization. Second, this initial solution is used as a start-up solution for the non-linear optimization algorithm being employed for determining a parameter space of the infinite-precision coefficients including the feasible space where the filter bank meets the given criteria. The third step involves finding the coefficients in this space so that the resulting filter bank meets the given criteria with simple coefficient representation forms. An example taken from the literature illustrates that the proposed algorithm results at least in a good suboptimal finite-precision solution in a fairly short time.
international symposium on circuits and systems | 2005
Juha Yli-Kaakinen; Tapio Saramäki
This paper describes an algorithm for finding the multiplierless coefficient representations for adjustable fractional-delay (AFD) all-pass filters. The optimization is performed in three basic steps. First, an initial filter is generated using a simple design scheme. Second, this filter is used as a start-up solution for the nonlinear optimization algorithm which is employed for determining a parameter space of the infinite-precision coefficients. This space includes the feasible space where the filter meets the given criteria. The third step involves finding the discrete coefficient values in this space so that the resulting filter meets the criteria with the simplest coefficient representation forms. Examples are included for illustrating the efficiency of the proposed synthesis scheme. In addition, the performance and the complexity of the multiplierless AFD all-pass filters are compared with those of the multiplierless AFD finite-impulse response filters implemented using the modified Farrow structure proposed by Vesma and Saramaki (1997). This comparison shows that the number of adders for the resulting filters are in the best case less than 50 percent compared with those implemented using the modified Farrow structure.
ISPA 2005. Proceedings of the 4th International Symposium on Image and Signal Processing and Analysis, 2005. | 2005
Juha Yli-Kaakinen; Tapio Saramäki
It has been shown by Renfors and Saramaki that if the phase linearity is not required, then the single-stage and multistage decimators and interpolators based on the use of the so-called recursive Nth-band filters provide the lowest computational complexities among the existing decimators and interpolators. This paper describes an efficient algorithm for designing these decimators and interpolators for both the single-stage and multistage implementations in such a way that the resulting filters become multiplierless with short coefficient wordlength. For single-stage filters, the coefficient optimization is performed in two steps. First, a nonlinear optimization algorithm is used for determining a parameter space of the infinite-precision coefficients including the feasible space, where the filter meets the given criteria. The second step involves finding the filter parameters in this space so that the resulting filter meets the given criteria with the simplest coefficient representation forms. For multistage decimators and interpolators, these two steps are performed independently for each filter stage by properly sharing their attenuation responsibilities. This considerably reduces the overall optimization time. An example is included in order to illustrate the benefits of the proposed synthesis scheme.
international symposium on control, communications and signal processing | 2004
Juha Yli-Kaakinen; Tapio Saramäki
This paper describes an efficient algorithm for designing multiplierless lattice wave digital filters (parallel connections of two all-pass filters) with short coefficient wordlength. The coefficient optimization is performed in two steps. First, a nonlinear optimization algorithm is used for determining a parameter space of the infinite-precision coefficients including the feasible space where the filter meets the given criteria. The second step involves finding the filter parameters in this space so that the resulting filter meets the given criteria with the simplest coefficient representation forms. Comparisons with some other existing quantization schemes show that the proposed algorithm gives better finite-precision solutions in all examples taken from the literature.
Circuits Systems and Signal Processing | 2006
Juha Yli-Kaakinen; Tapio Saramäki
international symposium on circuits and systems | 2004
Juha Yli-Kaakinen; Tapio Saramäki; Ya Jun Yu
IEEE Internet Computing | 2002
Juha Yli-Kaakinen; Tapio Saramäki