Julien Fleury

SPIROC (SiPM Integrated Read-Out Chip): dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35 m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100 ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memory content (time and charge on 2 gains). The data are then stored in a 4 kbytes RAM. A very complex digital part has been integrated to manage all theses features and to transfer the data to the DAQ which is described on [2].

SPIROC (SiPM Integrated Read-Out Chip): Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35 m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100 ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memory content (time and charge on 2 gains). The data are then stored in a 4 kbytes RAM. A very complex digital part has been integrated to manage all theses features and to transfer the data to the DAQ which is described on [2].

Petiroc and Citiroc: front-end ASICs for SiPM read-out and ToF applications

Petiroc and Citiroc are the two latest ASIC from Weeroc dedicated to SiPM read-out.Petiroc is a 16-channel front-end ASIC designed to readout silicon photomultipliers (SiPMs) for particle time-of-flight measurement applications. It combines a very fast and low-jitter trigger with an accurate charge measurement.Citiroc is a 32-channel front-end ASIC designed to readout silicon photo-multipliers (SiPM). It allows triggering down to 1/3 pe and provides the charge measurement with a good noise rejection. Moreover, Citiroc outputs the 32-channel triggers with a high accuracy (100 ps).Each channel of both ASICs combines a trigger path with an accurate charge measurement path. An adjustment of the SiPM high voltage is possible using a channel-by-channel input DAC. That allows a fine SiPM gain and dark noise adjustment at the system level to correct for the non-uniformity of SiPMs.Timing measurement down to 16 ps RMS jitter for Petiroc and 100 ps RMS for Citiroc is possible along with 1% linearity energy measurement up to 2500 pe. The power consumption is around 3.5 mW/channel for Petiroc and 3 mW/channel for Citiroc, excluding ASICs outing buffer.

Triroc: A Multi-Channel SiPM Read-Out ASIC for PET/PET-ToF Application

Triroc is the latest addition to SiPM readout ASICs family developed at Weeroc, a start-up company from the Omega microelectronics group of IN2P3/CNRS. This chip is developed under the framework TRIMAGE European project which is aimed for building a cost effective tri-modal PET/MR/EEG brain scan. To ensure the flexibility and compatibility with any SiPM in the market, the ASIC is designed to be capable of accepting negative and positive polarity input signals. This 64-channel ASIC, is suitable for SiPM readout which requires high accuracy timing and charge measurements. Targeted applications would be PET prototyping with time-of-flight capability. Main features of Triroc includes high dynamic range ADC up to 2500 photoelectrons and TDC fine time binning of 40 ps. Triroc requires very minimal external components which means it is a good contender for compact multichannel PET prototyping. Triroc is designed by using AMS 0.35 μm SiGe technology and it was submitted in March 2014. The detail design of this chip will be presented.

SPIROC: design and performances of a dedicated very front-end electronics for an ILC Analog Hadronic CALorimeter (AHCAL) prototype with SiPM read-out

For the future e+ e- International Linear Collider (ILC) the ASIC SPIROC (Silicon Photomultiplier Integrated Read-Out Chip) was designed to read out the Analog Hadronic Calorimeter (AHCAL) equipped with Silicon Photomultiplier (SiPM). It is an evolution of the FLC_SiPM chip designed by the OMEGA group in 2005. SPIROC2 [1] was realized in AMS SiGe 0.35 μm technology [2] and developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of read-out channels. This ASIC is a very front-end read-out chip that integrates 36 self triggered channels with variable gain to achieve charge and time measurements. The charge measurement must be performed from 1 up to 2000 photo-electrons (p.e.) corresponding to 160 fC up to 320 pC for SiPM gain 106. The time measurement is performed with a coarse 12-bit counter related to the bunch crossing clock (up to 5 MHz) and a fine time ramp based on this clock (down to 200 ns) to achieve a resolution of 1 ns. An analog memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. The analog memory content (time and charge) is digitized thanks to an internal 12-bit Wilkinson ADC. The data is then stored in a 4kbytes RAM. A complex digital part is necessary to manage all these features and to transfer the data to the DAQ. SPIROC2 is the second generation of the SPIROC ASIC family designed in 2008 by the OMEGA group. A very similar version (SPIROC2c) was submitted in February 2012 to improve the noise performance and also to integrate a new TDC (Time to Digital Converter) structure. This paper describes SPIROC2 and SPIROC2c ASICs and illustrates the main characteristics thank to a series of measurements.

The TRIMAGE PET Data Acquisition System: Initial Results

We present the first results obtained with a prototype of the PET read-out electronics of the trimodal PET/MRI/EEG TRIMAGE scanner. The read-out is based on the 64-channel TRIROC ASIC and on an acquisition board that will control up to 12 ASICs. The output of each ASIC is processed in parallel and sent to a host system that in the final version will receive data from 18 acquisition boards. Blocks of 64 SiPMs are one-to-one coupled to a dual-layer staggered LYSO crystal matrix and read by a single ASIC. The FPGA reads the sparse output from the ASICs and reconstructs for each event a full image of the light pattern coming from the LYSO matrix. This pattern can be then processed on-line or sent to the host PC for post-processing. Early tests were conducted by using a prototype board with single LYSO crystals of

Dedicated front-end electronics for the next generation of linear collider electromagnetic calorimeter

{3.3} \textrm {mm}\times {3.3} \textrm {mm} \times {8} \textrm {mm}

TRIMAGE: A dedicated trimodality (PET/MR/EEG) imaging tool for schizophrenia

and dual layer staggered LYSO matrices. Results show that the ASIC can sustain input rates above 58 kHz on all its channels, with small variations depending on the discriminating thresholds, being this limit due its digital output stage. With the single crystals setup, we obtained an energy resolution of 10.7% at 511 keV and a coincidence time resolution of 420 ps FWHM. With the staggered matrix the obtained mean energy resolution was 16% on the top layer and 18% on the bottom layer. The flood maps obtained with the LYSO matrix setup show that the pixels on both the staggered levels are clearly identifiable.

Triroc, a versatile 64-channel SiPM readout ASIC for time-of-flight PET

This paper describes an R&D electronic program for the next generation of linear collider electromagnetic calorimeter. After a brief presentation of the requirements, a global scheme of the electronics is given. Then, we describe the three different building blocks developed in 0.35\mum CMOS technology: an amplifier, a comparator and finally the pipelined ADC

Triroc: 64-channel SiPM read-out ASIC for PET/PET- ToF application

Simultaneous PET/MR/EEG (Positron Emission Tomography - Magnetic Resonance - Electroencephalography), a new tool for the investigation of neuronal networks in the human brain, is presented here within the framework of the European Union Project TRIMAGE. The trimodal, cost-effective PET/MR/EEG imaging tool makes use of cutting edge technology both in PET and in MR fields. A novel type of magnet (1.5T, non-cryogenic) has been built together with a PET scanner that makes use of the most advanced photodetectors (i.e., SiPM matrices), scintillators matrices (LYSO) and digital electronics. The combined PET/MR/EEG system is dedicated to brain imaging and has an inner diameter of 260 mm and an axial Field-of-View of 160 mm. It enables the acquisition and assessment of molecular metabolic information with high spatial and temporal resolution in a given brain simultaneously. The dopaminergic system and the glutamatergic system in schizophrenic patients are investigated via PET, the same physiological/pathophysiological conditions with regard to functional connectivity, via fMRI, and its electrophysiological signature via EEG. In addition to basic neuroscience questions addressing neurovascular-metabolic coupling, this new methodology lays the foundation for individual physiological and pathological fingerprints for a wide research field addressing healthy aging, gender effects, plasticity and different psychiatric and neurological diseases. The preliminary performances of two components of the imaging tool (PET and MR) are discussed. Initial results of the search of possible candidates for suitable schizophrenia biomarkers are also presented as obtained with PET/MR systems available to the collaboration.