Julien Ridoux

Robust synchronization of absolute and difference clocks over networks

We present a detailed re-examination of the problem of inexpensive yet accurate clock synchronization for networked devices. Based on an empirically validated, parsimonious abstraction of the CPU oscillator as a timing source, accessible via the TSC register in popular PC architectures, we build on the key observation that the measurement of time differences, and absolute time, requires separate clocks, both at a conceptual level and practically, with distinct algorithmic, robustness, and accuracy characteristics. Combined with round-trip time based filtering of network delays between the host and the remote time server, we define robust algorithms for the synchronization of the absolute and difference TSCclocks over a network. We demonstrate the effectiveness of the principles, and algorithms using months of real data collected using multiple servers. We give detailed performance results for a full implementation running live and unsupervised under numerous scenarios, which show very high reliability, and accuracy approaching fundamental limits due to host system noise. Our synchronization algorithms are inherently robust to many factors including packet loss, server outages, route changes, and network congestion.

Principles of robust timing over the internet

The key to synchronizing clocks over networks is taming delay variability.

Ten Microseconds Over LAN, for Free (Extended)

The status quo for time stamping in personal computers (PCs) is ntpd, which, under general conditions, is accurate to 1 ms at best. For precision applications, it is inadequate, but it is a low-cost solution that suits many generic applications. IEEE-1588 provides mechanisms for submicrosecond accuracy, but to achieve this, more hardware is needed. We have developed the TSCclock, which gives the performance between these two solutions [about 10 mus on a local area network (LAN)] beyond submilliseconds using commodity hardware. We benchmark the TSCclock to show its potential as an inexpensive yet accurate software clock, which can be used with IEEE-1588 for LANs but has wider applicability as a replacement to ntpd.

Seeing the Difference in IP Traffic: Wireless Versus Wireline

With the explosive growth of the Internet over the last 10 years, a lot of work has been dedicated to understanding the underlying mechanisms of wired IP traffic. Recently, the rapid deployment of large-scale wireless infrastructures in various environments and the interesting mixture of traffic carried coupled with the large diversity of devices accessing the medium (Cellphones, Laptops, PDAs) have triggered the attention and curiosity of the research community. This paper analyzes in depth the properties of several large traces of packet data collected between the wireless access point and the IP cloud from an operational wireless service provider. We determine unambiguously the influence of network variables such as the arrival patterns of packet and flows, flow durations and flow interactions, on the aggregate statistics of TCP traffic. In doing so, we highlight the main differences and similarities between wireless and wired IP traffic, and between the two directions (from wireless devices to IP cloud and vice-versa), and show how they can be distinguished. The resulting insights provide a foundation for models of such traffic, necessary for improved resource allocation schemes as well as for the effectiveness of future services and applications.

Ten Microseconds Over LAN, for Free

The status quo for timestamping in PCs is ntpd, which is accurate to 1[ms] at best. For precision applications this is inadequate, but it is a low cost solution which suits many generic applications. IEEE-1588 provides mechanisms for sub-microsecond accuracy, but to achieve this more hardware is needed. We have developed the TSCclock, which gives performance between these two, around 10 microseconds on LAN, sub millisecond beyond, but using commodity hardware. We begin detailed benchmarking of the TSCclock to show its potential as an inexpensive yet accurate software clock, which could be used with IEEE-1588 for LANs, but has wider applicability as a replacement to ntpd.

LiTGen, a lightweight traffic generator: application to P2P and mail wireless traffic

LiTGen is an easy to use and tune open-loop traffic generator that statistically models wireless traffic on a per user and application basis. We first show how to calibrate the underlying hierarchical model, from packet level capture originating in an ISP wireless network. Using wavelet and semi-experiments analysis, we then prove LiTGens ability to reproduce accurately the captured traffic burstiness and internal properties over a wide range of timescales. In addition the flexibility of LiTGen enables us to investigate the sensitivity of the traffic structure with respect to the possible distributions of the random variables involved in the model. Finally this study helps understanding the traffic scaling behaviors and their corresponding internal structure.

A Methodology for Clock Benchmarking

Accurate timestamping is a basic need in traffic monitoring as well as distributed computing in the broad sense, and is destined to become increasingly important as network latency becomes a hard barrier to improved performance across networks. Software clocks need to be improved to meet this challenge, however evaluating their performance is non trivial, as they are imbedded inside computing systems. We present a methodology for clock validation which allows many of the difficult problems to be resolved. Our method involves a combination of external and internal validation strategies, and makes use of GPS synchronized DAG cards and system clocks. We illustrate in detail how it may be applied using real data collected from 3 clocks implemented in UNIX PCs.

Counter availability and characteristics for feed-forward based synchronization

The availability of hardware counters in computers is essential both to the applications in charge of timekeeping, and those in need of accurate timestamping. Newer counters are now supported by open source operating systems, but the access interfaces are unnecessarily restricted, and in particular fail to satisfy the needs of feed-forward based synchronization algorithms. In this paper we present modifications to the Linux and FreeBSD kernels to enable any application to access all available counters in an unrestricted way, and then evaluate their stability, latency and robustness to stress. We demonstrate how the feed-forward based RADclock can, through this interface, make use of any of several counters, and achieve the same microsecond synchronization with each.

The cost of variability

We explore the robustness of synchronization performed in the presence of variable latencies using two software clocks: the TSCclock, designed to replace ntpd for Internet synchronisation, and ptpd, a software implementation of IEEE-1588. Using a precise comparison methodology the TSCclock is shown to be more accurate and far more robust. We discuss the reasons why and the implications for IEEE-1588 more generally.

Using LiTGen, a realistic IP traffic model, to evaluate the impact of burstiness on performance

For practical reasons, network simulators have to be designed on traffic models as realistic as possible. This paper presents the evaluation of LiTGen, a realistic IP traffic model, for the generation of IP traffic with accurate time scale properties and performance. We confront LiTGen against real data traces using two methods of evaluation. These methods respectively allow to observe the causes and consequences of the traffic burstiness. Using a wavelet spectrum analysis, we first highlight the intrinsic characteristics of the traffic and show LiTGens ability to reproduce accurately the captured traffic correlation structures over a wide range of timescales. Then, a performance analysis based on simulations quantifies the impact of these characteristics on a simple queuing system, and demonstrates LiTGens ability to generate synthetic traffic leading to realistic performance. Finally, we conduct an investigation for a possible model reduction using memoryless assumptions.