Jun Ho Cheon

Biosensor system-on-a-chip including CMOS-based signal processing circuits and 64 carbon nanotube-based sensors for the detection of a neurotransmitter

We developed a carbon nanotube (CNT)-based biosensor system-on-a-chip (SoC) for the detection of a neurotransmitter. Here, 64 CNT-based sensors were integrated with silicon-based signal processing circuits in a single chip, which was made possible by combining several technological breakthroughs such as efficient signal processing, uniform CNT networks, and biocompatible functionalization of CNT-based sensors. The chip was utilized to detect glutamate, a neurotransmitter, where ammonia, a byproduct of the enzymatic reaction of glutamate and glutamate oxidase on CNT-based sensors, modulated the conductance signals to the CNT-based sensors. This is a major technological advancement in the integration of CNT-based sensors with microelectronics, and this chip can be readily integrated with larger scale lab-on-a-chip (LoC) systems for various applications such as LoC systems for neural networks.

Self-gating effects in carbon nanotube network based liquid gate field effect transistors

We developed a field effect transistor which has two concentric electrodes as the source and drain with the carbon nanotube network as a semiconductor channel layer. When this device is placed in an aqueous solution for sensor applications, the electric potential of the liquid is stabilized to the electric potential of the enclosing electrode due to the larger electrical double layer capacitance between the liquid and the enclosing electrode, performing a gate reaction to the carbon nanotube network channel. This new phenomenon, hereafter called the self-gating effect, brings benefits to reliable operation of devices removing the need of an additional external reference electrode.

Electroless Gold Plating on Aluminum Patterned Chips for CMOS-Based Sensor Applications

We presented an approach for the activation of aluminum Al alloy using palladium Pd and the subsequent gold Au electroless plating ELP for complementary metal oxide semiconductor CMOS-based sensor applications. In this study, CMOS process compatible Al patterned chips were used as substrates for easy incorporation with existing CMOS circuits. To improve the contact resistance that arose from the Schottky barrier between the metal electrodes and the single-walled carbon nanotubes SWCNTs, electroless deposition of gold that has a higher work function than Al was adopted because the SWCNTs has p-type semiconductor properties. Each step of the Au ELP procedure was studied under various bath temperatures, immersion times, and chemical concentrations. Fine Pd particles were homogeneously distributed on the Al surface by the Pd activation process at room temperature. Au ELP allowed selective deposition of the Au film on the activated Al surface only. The SWCNT networks formed on the Au plated chip by a dip-coating method showed improved contact resistance and resistance variation between the Au electrode and SWCNTs. We also tried SWCNT decoration with the Au particle using the upper Au ELP method, which was expected to be applied in various areas including field-effect transistors and sensor devices.

Statistical property of the effect of Au nanoparticle decoration on the carbon nanotube network

Statistical analysis of the change in electrical characteristic of single-walled carbon nanotube (swCNT) network after the decoration of Au nanoparticles (NPs) is presented. We have fabricated 100 unitary swCNT network devices on a single chip employing a concentric electrode array by swCNT dip-coating and thermal evaporation of Au. The experimental results show that the decoration of Au-NP on the swCNT network can decrease not only its resistance but also variation in the resistance distribution. Remarkably, we have found that the change in electrical characteristic is correlated with the resistance value of the bare swCNT network.

Carbon Nanotube-Based CMOS Gas Sensor IC: Monolithic Integration of Pd Decorated Carbon Nanotube Network on a CMOS Chip and Its Hydrogen Sensing

The integration of carbon nanotube (CNT)-based sensor and readout complementary metal-oxide-semiconductor integrated chip (CMOS IC) to detect hydrogen gas in a single chip is presented. First, we have fabricated the CMOS IC using the standard 0.35-μm CMOS process. Then, we have built 8 × 8 CNT-based sensor cells on it using a proposed tractable postprocessing strategy and judicious electrode scheme. The fabricated sensor IC can operate down to 10-ppm concentration of hydrogen in air as a hydrogen sensor. This paper is expected to have a major impact upon the integration of the CNT technology with CMOS technology and be extended to the development of CMOS IC integrated with various nanomaterials.

Capacitive measurements for a novel ECIS (electrolyte–carbon nanotubes–insulator–semiconductor) structure

A novel capacitor, named an ECIS (electrolyte–carbon nanotubes–insulator–semiconductor), is proposed in this paper. By using a bonding technique, the characteristics of both the field-effect-based EIS (electrolyte–insulator–semiconductor) cell and vertically-aligned MWNT (multi-walled carbon nanotube) array are combined together to design the ECIS capacitor. Under a few hypotheses, the frequency dependence of the ECIS sample is also observed and analysed in this work. The new capacitor structure can be employed to integrate CNTs (carbon nanotubes) into CMOS chips. The prospect of future research is briefly outlined for the application of this novel capacitor in the field of potential-metric sensors.

Metal nanolayer formed by tunnelling current through thin oxide in the electrolyte–oxide–silicon system

We propose a method of forming metal nanoparticles or layers on the oxide by tunnelling current of the EOS (electrolyte–oxide–silicon) system. Electrical characteristics of the metal layer and particles obtained experimentally by the proposed method are compared with the electrolyte–metal–oxide–silicon and the metal–oxide–silicon systems. Also, it is shown that the instability of the EOS system is caused by the H+ penetration into the oxide and is largely cured by applying alternative voltage to extract the H+ ions from the oxide. We show that the proposed technique can selectively deposit extremely thin metal layers on the active sites of the silicon surface in a self-alignment manner.