Jusung Park

Design and implementation of 16-bit fixed point digital signal processor

This paper deals with the design and implementation of the 16-bit fixed point digital signal processor. The designed DSP has 211 instructions and consists of 40-bit ALU, 6 level pipelines, 17-bit X 17-bit parallel multiplier for single-cycle MAC operation, 8 addressing modes, 8 auxiliary registers, 2 auxiliary register arithmetic units, two 40-bit accumulators and 2 address generators. The verilog HDL coded synthesizable RTL code of the DSP core has a complexity of 69,860 in the two input NAND gates. We verified the functions of the DSP by a simulation with a single instruction test as the first step. and then implemented the DSP with the FPGA. The test vectors have a single instruction test, combination of single instructions and algorithm applications, ADPCM vocoder and the MP3 decoder. After FPGA verification, the DSP core is fabricated with 0.25 um CMOS technology. The DSP core carried out three test vector sets which are tested at FPGA at the 106 MHz clock rates.

Design and Implementation of Retargetable Software Debugger Based on GDB

Many processors for embedded system have been developed and is widely being used in many industrial area. If we develop a new embedded processor, we need a simulator, compiler, and debugger for developing an operating system and basic program running on the embedded processor. The debugger is used for finding the error in a program. theses software are very important in embedded system. In this paper, we design and implement a retargetable software debugger for a new 32-bit microprocessor. Our software debugger is based on GNU debugger (GDB) which is a widely used open-source debugger. We explain how to develop a retagetable software debugger for a new embedded processor rapidly. In order to develop a debugger rapidly, we extended only processor-dependent modules for register, memory and instruction set. And, we reused the processor-independent modules in the debugger. In the experiment, we tried to compare our software debugger with ARM AXD debugger to verify the debugger operation. The ARM AXD Debugger is well-known debugger for ARM processor.

Design of On-Chip Debug System for embedded processor

In this paper, we introduce on-chip debug system (OCDS) which supports symbolic debugging at c-level using OCD integrated Debug-logic into target processor. The OCDS consist of SW debugger that supports a functionality of symbolic debugging, OCD (on-chip debugger) serving as a debugger of internal state of target processor, and Interface & Control block interfacing SW debugger and OCD. After OCD block is interfaced with 32 bit RISC processor core and then implemented with FPGA, OCD is connected by Interface & Control block, and SW debugger. The verification of the design is carried out through device recognition, carrying-out instructions of JTAG(joint test action group), reading and writing the internal registers of the processor and memory, and checking the emulation functions such as setting break-points and watch points.

Multi-string AC-powered LED driver with current regulation reduction based on simple circuitry

In this letter, a new simple circuitry LED driver with current reduction is proposed, realized and experimentally validated. The proposed circuit comprises with very few components intended for making a costeffective and compact design while still shows a high performance. The circuit reduces non-conducting time of LEDs to enhance power factor (PF) and total harmonic distortion (THD). The flicker can also be relatively reduced. By using current limiter cells, lighting variation is eliminated with respect of the variation of AC input voltage. Aworst case of a 4W with only two LED-strings driver is implemented and tested by using a 1 um 650VBCDMOS high voltage process to verify advantageous characteristics of the suggested scheme. Experimental results demonstrate a PF of 0.97 with a THD of 24.62% and an efficiency of 87.1% at a 220V AC supply.

A novel on-chip step-dimmer for low cost AC-powered HV-LED driver

This letter proposes a novel on-chip step-dimmer using an analog dimming method for a high PF AC-powered LED driver. The full AC LED driver can achieve a very high PF and a low THD by using a self-adaptive power processing circuit while delivering a best-in-class dimming performance with the proposed step-dimmer. Under the control of the dimming signal, the dimming voltage is step-adjusted from 1.0V to 2.5V, the average LED current can be changed from 40% to 100% of the nominal LED current value. To verify the feasibility of the proposed scheme, an 8-string 4.4WAC-powered LED driver with the proposed step-dimmer was designed and simulated using a 0.35 um-700V BCD Magnachip process. The gained results verify that the proposed step-dimmer can maintain a high performance of the AC LED driver under different dimming modes with a PF and a THD around 0.998 and 6%, respectively.

Design methodology for on-chip-based processor debugger

Due to the increased complexity of modern embedded systems and time-to-market constraints, a debugger with efficient debugging functions is becoming increasingly necessary, and it plays an important role in the development of application systems. Accordingly, the implementation of efficient debug functionalities must a critical process in the design of a new processor. Since deeply embedded processor cores in a core-based system chip allow only restricted access for debugging its internal status, most recent processors employ the on-chip-based debug method that embeds special logic-supporting debug capabilities. In this paper, we propose an on-chip debug support logic that can be embedded into the processor core to support debug functions. Moreover, we describe an overall implementation method of the on-chip-based processor debugger based on the on-chip debug support logic, which includes a source-level debugger and an interface block. We designed an on-chip debug support logic, and embedded it into a target processor core. We used the GNU Project debugger (GDB) as the source-level debugger of the target processor core. An interface block that uses the remote debugging features of GDB was also developed and that includes a software module and a hardware board. We discuss all major design steps for implementing this on-chip-based processor debugger. We have successfully applied the proposed implementation method to develop the processor debugger for two new 32-bit RISC processors. In addition, we introduce another use of the on-chip-based processor debugger in the design of a processor-based system chip, which can facilitate simulation-based functional verification.

Effective liver cancer diagnosis method based on machine learning algorithm

In this paper, we introduce a method to find useful markers from sensor arrays which have massive sensing points and diagnose liver cancer based on machine learning algorithms which are neural network and fuzzy neural network. We obtain reliable results by using a learning ability and n-fold cross validation. For the verification of the proposed method, raw data of serums from 314 normal and 81 patients reacted to 1,142 aptamers are used. According to the results, we can detect liver cancer with the accuracy of 99.19 % by average use of 132 aptamers based on neural network and 98.19 % by average use of 226 aptamers based on fuzzy neural network.

The Design of Platform System for Measuring Bio-Signal with Array Sensors

Platform system for measuring the bio-signal, especially Aptamer using array sensor is designed. This platform system is based on 32-bit RISC processor, AMBA bus, peripheral device and interface for array sensors. Array sensors measure a variation of capacitance value by reaction with Aptamer from bio-signal. Processor reduces noise from measured bio-signal and carries out bio-signal processing algorithm.

Bio-signal procssor platform system for array sensors

Bio-signal processor platform system carries out the bio-signal processing extracted from array sensors. This system consists of 32-bit RISC processor, data converter circuit, array sensors and bio-signal processing algorithm. The designed specific processor includes CPU functional blocks and memory. Array sensors measure a variation of capacitance value by reaction with DNA, aptamer and protein. Processor reduces noise component from measured bio-signal and compares and detects disease by analyzing properties of bio-signals.

Synthesis of Alumina Powders from Kaolin with and Without Ultrasounds

Alumina (Al2O3) powders were synthesized by extracting Al2O3 from kaolin via kaolin-H2SO4 reactions with and without ultrasounds. The amount of Al2O3 extracted from kaolin via the ultrasonic extraction process was investigated by comparing reaction time and reaction temperature with the same factors under the conventional extraction process. The time to obtaining a given amount of Al2O3 by the ultrasonic process was shorter than that by the conventional process, indicating that the application of ultrasound in the synthesis of Al2O3 powders is an efficient way to reduce synthesizing time.