K.Y. Eng

Multicast and broadcast services in a knockout packet switch

The knockout switch is a packet-switch architecture recently proposed for high-performance packet networks. In addition to providing point-to-point connections among user pairs, a packet network must often support multicast and broadcast capabilities. Multicast connections differ from point-to-point connections in that each packet is addressed to a number of destinations. Two specific approaches using the knockout switch to provide a practical and efficient means for multicast services under both light and heavy traffic conditions are proposed. The first involves packet duplication and is more suitable for light traffic loads. The second uses a fast address comparison technique and is capable of handling larger loads. In both cases, the knockout principle is utilized to yield the best delay-throughput performance, guarantee the first-in first-out packet sequence, and provide for a simple, modular implementation.<<ETX>>

A Knockout Switch for Variable-Length Packets

The Knockout Switch is a new packet switch architecture recently proposed for high-speed local and metropolitan area networks, multiprocessor interconnects, and local or toll switches for integrated traffic loads. We describe an approach to extend the original Knockout Switch to work with variable-length packets. This new architecture employs an input broadcast bus arrangement to achieve complete interconnection of the inputs and outputs. Consequently, there is no congestion in the switch fabric other than the unavoidable conflict of multiple simultaneous packets destined for the same output. It is with this output contention that the Knockout principle is fully utilized to efficiently concentrate and store contending packets while maintaining the first-in first-out discipline of the packet sequence; and yet the fabric speed required is no more than the input/output line speeds, Under these design goals, no switch can yield better delay/ throughout performance. These are the most important attributes that have been preserved in the current proposal from the original Knockout Switch. For an N \times N switch configuration, the variable-length packet Knockout Switch consists of N input broadcast buses, and an N:L concentrator ( L \ll N ) and a shared buffer for each output. The design of each subsystem is discussed with emphasis on possible VLSI realization. Using todays technology, we should be able to implement the proposed switch with both input/output lines and internal hardware operating at 50 Mbits/s. The dimension of the switch ( N \times N ) can grow modularly from say 32 × 32 to 1024 × 1024, rendering a total throughput in the range of tens of gigabits per second. Future upgrading of the line interfaces to much higher speed without modification to the internal switch hardware is also possible with a modest restriction on the minimum length of new packets.

A photonic knockout switch for high-speed packet networks

A high-performance packet switch is discussed which uses a photonic interconnect fabric to route very-wideband data packets from input to output. Packet contention is accomplished using a much slower electronic controller, based on the knockout principle operating in parallel with the optical interconnect. Specifically, the use of a wavelength-division-multiplex fabric whereby high-speed (2-4 Gb/s) packets are regenerated before modulating a single-frequency laser at each switch input. The optical signals from various inputs are summed in a star coupler and then broadcast to the different coupler outputs. Each coupler is equipped with a small number (L) of tunable receivers arranged in a parallel manner, each preceded by a power splitter so that up to L simultaneous packets can be received by each output. The L packets so received are stored in an L-input one-output first-in first-out (FIFO) buffer so that the FIFO packet sequence is always guaranteed. Not only does this architecture achieve the best delay-throughput performance, but, remarkably, modularity is such that the optical complexity grows linearly with the number of switch ports./. >

A demand-assignment access control for multi-code DS-CDMA wireless packet (ATM) networks

In a wireless packet (e.g., ATM) network that supports an integrated mix of multimedia traffic, a large variety of mobiles with different service rates will need to be accommodated efficiently in a bandwidth-on-demand fair-sharing manner. We propose and study multi-code CDMA (MC-CDMA) with distributed-queueing request update multiple access (DQRUMA) for multi-rate wireless packet networks. The network incorporates MC-CDMA (a flexible multiplexing scheme for providing multi-rate packet transmissions) and DQRUMA (an efficient demand-assignment multiple access protocol for wireless access and scheduling) to form a unified bandwidth-on-demand fair-sharing platform for multi-rate wireless services. A slot-by-slot packet transmit scheduling policy provides the possibility of slot-by-slot allocation of pseudo-noise (PN) codes (primary codes) and optimal power levels to the mobiles involved in packet transmissions. Also, a maximum capacity power allocation (MCPA) criterion is derived to exploit the subcode concatenation property of the MC-CDMA transmission. Simulation results show that the system provides close to ideal-access performance for multi-rate mobiles, both with homogeneous traffic characteristics and with a mix of heterogeneous traffic characteristics.

A high-performance prototype 2.5 Gb/s ATM switch for broadband applications

A prototype 2.5 Gb/s ATM (asynchronous transfer mode) switch fabric was developed for flexible broadband applications. The prototype configuration supports multiple standard line card interfaces. Employing the concept of hierarchical multiplexing, the ATM cells are extracted from the payload of these SDH (synchronous digital hierarchy) signals and multiplexed inside the fabric to an internal equivalent cell rate of 2.5 Gb/s. Routing is done on a cell-by-cell basis according to the cell header address information. The core fabric of the switch is therefore a 2.5-Gb/s ATM switch. The fabric is designed, using the theory of the growable switch architecture, to guarantee the best possible delay-throughput performance for arbitrary traffic distributions for independent inputs. In this prototype implementation, physical size, physical growth, power consumption, protection switching, maintenance, and reliability are optimized. The core 2.5 Gb/s fabric prototype can grow from 8*8 (supporting up to 128 STM-1 interfaces) to larger sizes (e.g. 64*64, supporting up to 1024 STM-1 interfaces). Considerations for substantially larger switch sizes are also taken into account. The initial prototype and its evolution to larger switch dimensions are discussed.<<ETX>>

Star-coupler-based optical cross-connect switch experiments with tunable receivers

An optical cross-connect switch using the star-coupler-based frequency-division-multiplex technique are discussed. Two specific tunable receivers have been implanted. The first is a heterodyne receiver with a tunable laser as the local oscillator (LO) and the second is a tunable filter followed by a direct-detection receiver. In the heterodyne receiver, the tunable LO was a monolithic three-section multiple-quantum-well distributed Bragg laser capable of a 1000-GHz tuning range. Receiver sensitivity was measured to be -38 dBm at 1 Gb/s (BER=10/sup -10/). The power margin in the system substantiated feasibility for a 400*400 switch. In the tunable-filter receiver, the tunable filter is a tunable two-stage optical fiber Fabry-Perot filter design consisting of a narrowband filter followed by a wideband filter. The tuning of the filters is computer controlled, and the combined filter has a tuning range of 15000 GHz with a finesse of approximately=5170. Therefore, it is capable of covering over 1000 channels of 2.9 GHz each. >

An ATM cross-connect system for broadband trials and applications

A prototype ATM cross-connect system has been developed by AT&T in joint collaboration with NTT. The system is intended for flexible broadband trials and service applications. The system supports multiple standard line card interfaces, e.g. 155 Mb/s STM-1, 622 Mb/s STM-4c and 2.5 Gb/s STM-16. These different interfaces can be installed interchangeably into the same physical slots in an arrangement called universal line card slots. ATM cells extracted from different incoming SDH signals are multiplexed to 2.5 Gb/s inside the system for internal cell switching in a core fabric (hierarchical multiplexing). The ATM cross-connect system is based on a growable switch architecture that starts with an 8/spl times/8 main frame with a shared-memory switch delivering the best-possible delay-throughput performance and optimal buffering to minimize the cell loss probability. With virtually no effect on performance, the core fabric can be expanded to 32/spl times/32, yielding a total system capacity of 80 Gb/s. Further growth to substantially larger sizes is possible. Service-oriented features include 1+1 hitless protection switching, in-service upgrade and compact physical size.<<ETX>>

A 160-Gb/s ATM switch prototype using the concentrator-based growable switch architecture

We describe the theory, design and implementation of a 2.5-Gb/s ATM switch growable to very large sizes, say 512/spl times/512 (1.28 Tb/s capacity), using a concentrator-based growable switch architecture. This architecture is based on a front-end concentrator-based cell distribution network followed by fixed-size ATM output switches. The front-end concentrator arrangement provides FIFO cell distribution with practical modularity and negligible cell loss. The ATM output switches are small-size shared memory designs that ensure optimal delay throughput performance for arbitrary traffic patterns. Our prototype consists of a complete and independent 2.5-Gb/s 8/spl times/8 ATM switch system with optical 2.4-Gb/s OC-48c and 155 Mb/s OC-3c interfaces, and also an expansion module (half shelf) capable of supporting eight such 8/spl times/8 switch systems yielding a total prototype capacity of 160 Gb/s.

Gigabit-per-second ATM packet switching with the growable switch architecture

The issue of gigabit ATM packet switching, which has potential applications in emerging B-ISDN as well as in the gigabit testbed experiments, is discussed. The authors use the theory of a growable switch architecture consisting of a column of small output packet switch modules preceded by a memoryless cell distribution network. This architecture permits modular growth with the best possible (output-queuing) delay-throughput performance for arbitrary traffic distributions. An optical star-coupler-based arrangement for the cell distribution network is proposed.<<ETX>>

A multigigabit/second wavelength-division-multiplexing byte-by-byte switch using fast tunable heterodyne receivers

Fast-frequency laser tuning and a 2*2 electrooptic switch have been combined to perform byte-by-byte switching at synchronous optical network (SONET) rates using a wavelength-division-multipling (WDM) architecture. The three-section distributed-Bragg-reflector (DBR) lasers used can be tuned over a 100-GHz range in 5 ns. >