Kah-Yoong Chan

Ambipolar charge transport in microcrystalline silicon thin-film transistors

Hydrogenated microcrystalline silicon (μc-Si:H) is a promising candidate for thin-film transistors (TFTs) in large-area electronics due to high electron and hole charge carrier mobilities. We report on ambipolar TFTs based on μc-Si:H prepared by plasma-enhanced chemical vapor deposition at temperatures compatible with flexible substrates. Electrons and holes are directly injected into the μc-Si:H channel via chromium drain and source contacts. The TFTs exhibit electron and hole charge carrier mobilities of 30–50u2002cm2/Vu2009s and 10–15u2002cm2/Vu2009s, respectively. In this work, the electrical characteristics of the ambipolar μc-Si:H TFTs are described by a simple analytical model that takes the ambipolar charge transport into account. The analytical expressions are used to model the transfer curves, the potential and the net surface charge along the channel of the TFTs. The electrical model provides insights into the electronic transport of ambipolar μc-Si:H TFTs.

Microcrystalline silicon thin-film transistors operating at very high frequencies

The switching behavior of hydrogenated microcrystalline silicon thin-film transistors (TFTs) was examined and switching frequencies exceeding 20 MHz were measured for short channel devices. The microcrystalline silicon TFTs were prepared by plasma-enhanced chemical vapor deposition at temperatures compatible with plastic substrates. The realized microcrystalline silicon transistors exhibit high electron charge carrier mobilities of 130u2002cm2/Vu2009s. The switching frequency is limited by the contact resistances and overlap capacitances between the gate and the drain/source electrodes. Switching frequencies larger than 20 MHz were measured for transistors with a channel length of 5u2002μm. The high switching frequencies facilitate the realization of radio-frequency identification tags operating at 13.56 MHz.

Electrical Stability of High-Mobility Microcrystalline Silicon Thin-Film Transistors

The electrical stability of high-mobility microcrystalline silicon (μc -Si:H) thin-film transistors (TFTs) was investigated and compared to amorphous silicon (a-Si:H) TFTs. Under prolonged bias stress the microcrystalline silicon TFTs exhibit an improved electrical stability compared to amorphous silicon TFTs. The microcrystalline silicon TFTs were prepared by plasma-enhanced chemical vapor deposition at temperatures compatible with flexible substrates. The realized microcrystalline silicon transistors exhibit electron charge carrier mobilities exceeding 30 cm2/V·s. Prolonged operation of the transistors leads to a shift of the threshold voltage towards positive and negative gate voltages depending on the gate biasing conditions (positive or negative gate voltage). The shift of the threshold voltage increases with increasing positive and negative gate bias stress. The behavior is fundamentally different from the behavior of the amorphous silicon TFTs, which exhibit only a shift of the threshold voltage towards positive gate voltages irrespective of the polarity of the gate bias stress. The threshold voltage shift of the microcrystalline silicon TFTs saturates after a few minutes to a few hours, depending on the gate voltage. After prolonged bias stress, a recovery of the initial threshold voltage is observed without any thermal annealing or biasing of the transistors, which is not the case for the measured amorphous silicon TFTs.

Effects of Annealing on Sn Whisker Formation Under Temperature Cycling and Isothermal Storage Conditions

The global move toward reducing the usage of lead in electronics manufacturing industry is driving the industry to switch from tin-lead alloys to pure tin (Sn) for its component plating process. This transition has resulted in a reliability concern due to the formation of conductive Sn whiskers, which can grow from the component after the plating process within a few hours to months, with their length ranging from 10 micrometers up to several millimeters. The conductive Sn whiskers may cause current leakage or short circuits, leading to catastrophic failure in the field. This paper presents the results of an experimental study on Sn whisker formation based on the effects of annealing for 1 h at 150°C and environmental test conditions from the joint electron devices engineering council standards. This paper consisted of one temperature cycling test and two isothermal storage tests. The characterization results obtained confirm that temperature cycling and isothermal storage favor the formation of whiskers on Sn-plated copper lead frames. The average maximum length of the whiskers increased with the number of temperature cycles and duration of isothermal storage. It is also shown that annealing for 1 h at 150°C of the samples is effective in reducing the average maximum length of whiskers. Growth mechanisms of the Sn whiskers due to the effects of annealing and without annealing are also discussed.