Kaoru Maekawa

Mitigation of plasma-induced damage in porous low-k dielectrics by cryogenic precursor condensation

The present work describes the plasma etch properties of porous organo-silicate materials at cryogenic temperature. The mechanism of plasma damage is studied by means of in situ ellipsometry and post-etch material evaluation. Using conventional volatile reactants such as SF6, it is found that low plasma damage can be achieved below -120 degrees C through two main channels: pore sidewall passivation by molecular SF6 and partial condensation of non-volatile etch by-products. The protection can be enhanced by means of gas phase precursors with low saturated vapor pressure. Using C4F8, complete pore filling is achieved at -110 degrees C and negligible plasma-induced damage is demonstrated on both blanket and patterned low-k films. The characteristics of the precursor condensation process are described and discussed in detail, establishing an optimal process window. It is shown that the condensation temperature can be raised by using precursors with even lower vapor pressure. The reported in situ densification through precursor condensation could enable damage-free plasma processing of mesoporous media.

Cryogenic etching processes applied to porous low-k materials using SF6/C4F8 plasmas

Cryogenic etching processes in SF6 and SF6/C4F8 plasmas were successfully applied to porous organosilicate glasses. Such materials are low-k candidates for advanced interconnects. Their integration is very challenging because of plasma induced damage. These two chemistries (SF6 and SF6/C4F8) have demonstrated a promising capability of significantly reducing the damage caused by plasma etching. Desorbed species were analyzed during the wafer warm-up from cryogenic to room temperature by in situ mass spectrometry. An equivalent damage layer (EDL) was evaluated by ex situ Fourier transform infrared (FTIR) spectroscopy and in situ ellipsometry. An anneal step at 350 °C seems efficient to completely desorb the remaining CF x species. Anisotropic profiles were obtained using both chemistries. The selectivity is enhanced using SF6/C4F8 process at low temperature.

Fabrication of segmented-channel MOSFETs for reduced short-channel effects

To facilitate continued CMOS technology scaling, thin-body transistor structures such as the FinFET [1] and fully depleted silicon-on-insulator (FD-SOI) MOSFET [2] have been proposed to better suppress short-channel effects (SCE) than the conventional MOSFET structure in the sub-25 nm gate length (Lg) regime. However, these structures require either more challenging fabrication processes or more expensive silicon-on-insulator substrates. Recently, a segmented-channel bulk MOSFET (SegFET) structure [3] was proposed as a more evolutionary solution that offers the advantages of a thin-body MOSFET (reduced variability in performance and improved scalability) together with the advantages of a conventional planar MOSFET (low substrate cost and capability for dynamic threshold-voltage control).

Electrical properties and TDDB performance of Cu interconnects using ALD Ta(Al)N barrier and Ru liner for 7nm node and beyond

We have integrated ALD barrier and Ru liner for novel interconnect integration and have evaluated electrical properties and time dependent dielectric breakdown (TDDB). RC and via resistance were reduced by the ALD barrier, and particularly it was confirmed that TDDB performance can be improved by using ALD TaAlN with an ultrathin film. Accordingly, ALD TaAlN barrier and CVD Ru liner are attractive barrier/liner combination for next generation interconnect integration schemes.

Deposition behavior and substrate dependency of ALD MnO x diffusion barrier layer

We investigated the possibility of applying an ALD method to form a Cu diffusion barrier layer of MnOx in an attempt to develop a deposition process which would not be influenced by absorbed water in a substrate. The MnOx formed by ALD using (EtCp)2Mn and H2O had the following features. (1) Capability of thickness control of the MnOx layer by changing the ALD cycle number. (2) Capability of the ALD-MnOx formation on low-k dielectrics by surface modification. (3) Good adhesion of the Cu/ALD-MnOx/SiOCH structure showing a fracture toughness of 0.3 MPa·m1/2. (4) Good diffusion barrier property for the thickness of over 1 nm. (5) Minimizing via resistance increase accompanied by the formation of MnOx on Cu.