Karim Huet

Suppression of the orientation effects on bandgap in graphene nanoribbons in the presence of edge disorder

This letter shows that a moderate degree of edge disorder can explain the fact that the experimentally measured bandgaps of graphene nanoribbons (GNRs) do not depend on orientation. We argue that GNRs actually behave similarly to Anderson insulators and the measured bandgaps should thus be interpreted as quasi-mobility edges. Calculations in the tight binding approach reveal that in the presence of edge disorder, quasi-mobility edge and electronic structures become independent of orientation and that quasi-mobility edge follows a quasi-universal law similar to experimental data, although with different parameters.

On the Ability of the Particle Monte Carlo Technique to Include Quantum Effects in Nano-MOSFET Simulation

In this paper, we report on the possibility of using particle-based Monte Carlo (MC) techniques to incorporate all relevant quantum effects in the simulation of semiconductor nanotransistors. Starting from the conventional MC approach within the semiclassical Boltzmann approximation, we develop a multisubband description of transport to include quantization in ultrathin-body devices. This technique is then extended to the particle simulation of quantum transport within the Wigner formulation. This new simulator includes all expected quantum effects in nanotransistors and all relevant scattering mechanisms, which are taken into account the same way as in Boltzmann simulation. This paper is illustrated by analyzing the device operation and performance of multigate nanotransistors in a convenient range of channel lengths and thicknesses to separate the influence of all relevant effects: Significant quantization effects occur for thickness smaller than 5 nm and wave-mechanical-transport effects manifest themselves for channel length smaller than 10 nm. We also show that scattering mechanisms still have an important influence in nanoscaled double-gate transistors, both in the intrinsic part of the channel and in the resistive lateral extensions.

Optimized Laser Thermal Annealing on Germanium for High Dopant Activation and Low Leakage Current

In this paper, state-of-the-art laser thermal annealing is used to fabricate Ge diodes. We compared the effect of laser thermal annealing (LTA) and rapid thermal annealing (RTA) on dopant activation and electrical properties of phosphorus and Arsenic-doped n+/p junctions. Using LTA, high carrier concentration above 1020 cm-3 was achieved in n-type doped regions, which enables low access resistance in Ge devices. Furthermore, the LTA process was optimized to achieve a diode ION/IOFF ratio ~105 and ideality factor (n) ~1.2, as it allows excellent junction depth control when combined with optimized implant conditions. On the other hand, RTA revealed very high ION/IOFF ratio ~107 and n ~1, at the cost of high dopant diffusion and lower carrier concentrations which would degrade scalability and access resistance.

Atomically Flat Low-Resistive Germanide Contacts Formed by Laser Thermal Anneal

In this paper, state-of-the-art laser thermal annealing is used to form germanide contacts on n-doped Ge and is systematically compared with results generated by conventional rapid thermal annealing. Surface topography, interface quality, crystal structure, and material stoichiometry are explored for both annealing techniques. For electrical characterization, specific contact resistivity and thermal stability are extracted. It is shown that laser thermal annealing can produce a uniform contact with a remarkably smooth substrate interface with specific contact resistivity two to three orders of magnitude lower than the equivalent rapid thermal annealing case. It is shown that a specific contact resistivity of 2.84 × 10-7 Ω·cm2 is achieved for optimized laser thermal anneal energy density conditions.

High performance polysilicon NEMS fabricated at low temperature with UV laser annealing

In this paper, we present for the first time poly-Silicon nanowire (poly-Si NW) based NEMS resonators fabricated at very low temperature (300°C max) and recrystallized with a 308nm excimer laser for low cost co-integrated mass sensors on CMOS. Poly-Si NEMS performances have been systematically compared to crystalline silicon (c-Si) NEMS and most important resonators figure of merit have been extracted. Within an excellent fabrication yield, the stability measurements of poly-Si NEMS lead to a mass resolution detection in air down to 190 zg (×10-21g).

UV Excimer Laser Annealing for Next Generation Power Electronics

Advanced processes for next generation power devices have been studied in this paper. For silicon (Si)-IGBT applications, a near-perfect deep activation of over 4μm depth has been demonstrated in a phosphorous (Ph) doped Si wafer. In addition, progresses of epitaxial regrowth and ohmic contact formation on a silicon-carbide (SiC) wafer have been reported.

Heavily-doped germanium on silicon with activated doping exceeding 10 20 cm −3 as an alternative to gold for mid-infrared plasmonics

Ge-on-Si has been demonstrated as a platform for Si foundry compatible plasmonics. We use laser thermal annealing to demonstrate activated doping levels >10²⁰ cm⁻³ which allows most of the 3 to 20 μm mid-infrared sensing window to be covered with enhancements comparable to gold plasmonics.

Deep junction by low thermal budget process for advanced Si power electronics

Two new processes for deep junction formation have been demonstrated with low thermal budget UV excimer laser annealing using the melting regime: (i) in-depth controllable activation after high energy implantation and (ii) diffusion and recrystallization after heavily-doped Si deposition.

Impact of strain on p-DGMOS performance using full-band Monte Carlo simulation

In this paper, the influence of mechanical stress on double-gate p-MOSFET performance has been investigated, by means of the full-band version of our Monte Carlo simulator (MONACO). Compressive and tensile stresses in the case of biaxially- and uniaxially-strained 〈100〉 and 〈110〉-oriented channels have been studied. A tensile biaxial stress in plane (100) always decreases the gate delay and the lowest values are obtained for a 〈100〉-oriented channel. A compressive uniaxial stress along 〈110〉 (or tensile uniaxial stress along 〈−110〉) leads to an appreciable improvement of the gate delay in 〈110〉-oriented channel devices. Resulting performance meets quite well the specifications of the updated 2008 ITRS defined for LOP45 and LSTP40.