Karl Gugel

Wireless, In Vivo Neural Recording using a Custom Integrated Bioamplifier and the Pico System

This paper describes a wireless system for sampling multiple channels of neural activity based on a low-power, custom 80dB-gain integrated bioamplifier, Texas Instruments MSP430 microprocessors, and Nordic Semiconductors ultra low power, high bandwidth RF transmitter/receivers. The systems features are presented as well as results of spike potentials from a live subject.

Feasibility of fixed-point transversal adaptive filters in FPGA devices with embedded DSP blocks

Transversal adaptive filters for digital signal processing have traditionally been implemented into DSP processors due to their ability to perform fast floating-point arithmetic. However, with its growing die size as well as incorporating the embedded DSP block, the FPGA devices have become a serious contender in the signal processing market. Although it is not yet feasible to use floating-point arithmetic in modern FPGAs, it is sufficient to use fixed-point arithmetic and still achieve tap-weight convergence for adaptive filters. This paper examines the feasibility of implementing an adaptive algorithm, namely the LMS algorithm, based on fixed-point arithmetic, using the Altera Stratix device.

Wireless Transmission of Neural Signals Using Entropy and Mutual Information Compression

Two of the most critical tasks when designing a portable wireless neural recording system are to limit power consumption and to efficiently use the limited bandwidth. It is known that for most wireless devices the majority of power is consumed by the wireless transmitter and it often represents the bottleneck of the overall design. This paper compares two compression techniques that take advantage of the sparseness of the neural spikes in neural recordings using an information theoretic formalism to enhance the well-established vector quantization (VQ) algorithm. The two discriminative VQ algorithms are applied to neuronal recordings proving their ability to accurately reconstruct action potential (AP) regions of the neuronal signal while compressing background activity without using thresholds. The two operational modes presented offer distinct characteristics to lossy compression. The first approach requires no preprocessing or prior knowledge of the signal while the second requires a training set of spikes to obtain AP templates. The compression algorithms are implemented on an on-board digital signal processor (DSP) and results show that power consumption is decreased while the bandwidth is more efficiently utilized. The compression algorithms have been tested in real time on a hardware platform (PICO DSP ) enhanced with the DSP which runs the algorithm before sending the compressed data to a wireless transmitter. The compression ratios obtained range from 70:1 and 40:1 depending on the signal to noise ratio (SNR) of the input signal. The spike sorting accuracy in the reconstructed data is 95% compatible to the original neural data.

Neural signal sampling via the low power wireless pico system.

This paper presents a powerful new low power wireless system for sampling multiple channels of neural activity based on Texas Instruments MSP430 microprocessors and Nordic Semiconductors ultra low power high bandwidth RF transmitters and receivers. The systems development process, component selection, features and test methodology are presented

Compression of neural signals using discriminative coding for wireless applications

One of the most critical tasks when designing a portable wireless neural recording system is to limit power consumption. This paper proposes a new compression technique applied to neuronal recordings in real-time. The signal is compressed before transmission using a discriminative vector quantization algorithm and then it is reconstructed on the receiver side. Results show that power consumption is decreased while more efficiently using the limited bandwidth. A discriminative Linde-Buzo-Gray algorithm (DLBG) preserves action potential regions of the neuronal signal where information is contained while efficiently filtering background activity. The compression algorithm has been tested in real time on a hardware platform (PICO DSP [3]) that has a Digital Signal Processor (DSP) which performs the algorithm before sending the compressed data to a wireless transmitter. The compression ratios obtained range between 20:1 and 70:1 depending on the embedding size of the signal and the number of code-vectors used.

Real-time PCA (principal component analysis) implementation on DSP

PCA (principal component analysis) is a wellknown statistical technique used in many signal processing applications. An on-line temporal PCA learning algorithm is implemented on a floating-point DSP for real-time applications. This algorithm is coded in assembly language to optimize. The experimental results showed that the implemented on-line temporal PCA algorithm not only can accurately estimate the principal components from the input but also can track the principal components from the time varying input. And this algorithm can be applied in space easily by using spacial signals as its inputs instead of using the past inputs as in temporal PCA.

Implementation and evaluation of an OFDM-based MIMO system

In this paper, we consider the implementation and evaluation of an orthogonal frequency-division multiplexing (OFDM)-based multiple-input multiple-output (MIMO) communication system, which doubles the transmission data rate of the IEEE 802.11a conforming system using two transmit and two receive antennas. A function reconfigurable hardware platform is developed for the system using the Texas instruments TMS320VC33 DSP as its core processor and the high speed PCI bus as its PC-DSP interface. On this platform, we partially implement the receiver of the system. To investigate the feasibility of real-time implementation, the computational efficiency and complexity of the receiver are also evaluated, which shows that the MIMO receiver works very efficiently and will not increase the hardware complexity too much.

A high-performance multi-purpose DSP architecture for signal processing research

This paper presents a powerful and flexible digital signal processing (DSP) architecture based on the Texas Instruments TMS320VC33 DSP and high speed PCI bus. The DSP board provides a convenient, flexible means to test signal processing algorithms in real-time hardware. Algorithms implemented for several research projects include normalized least mean square (NLMS) adaptive filter, recurrent neural network (RNN), Viterbi decoding, and adaptive beamforming. The low-cost, reconfigurable system is presently being used in various research projects such as multiple channel sampling and filtering MEMS-based acoustic arrays, wireless LAN hardware implementation, and neural net classification of primate EEG waveforms. The paper provides a detailed description of the DSP board, the theory behind its selection of components, and how it is being used in the earlier mentioned research projects.

Wireless transmission of neuronal recordings using a portable real-time discrimination/compression algorithm

A design challenge of portable wireless neural recording systems is the tradeoff between bandwidth and power consumption. This paper investigates the compression of neuronal recordings in real-time using a novel discriminating Linde-Buzo-Gray algorithm (DLBG) that preserves spike shapes while filtering background noise. The technique is implemented in a low power digital signal processor (DSP) which is capable of wirelessly transmitting raw neuronal recordings. Depending on the signal to noise ratio of the recording, the compression ratio can be tailored to the data to maximally preserve power and bandwidth. The approach was tested in real and synthetic data and achieved compression ratios between 184:1 and 10:1.

A Reconfigurable Neural Signal Processor (NSP) for Brain Machine Interfaces

In this paper, we present a design for a wearable computational DSP system that alleviates the issues of a previous design and provides a much smaller and lower power solution for the overall BMI goals. The system first acquires the neural data through a high speed data bus in order to train and evaluate prediction models. Then it wirelessly transmits the predicted results to a simulated robot arm. This system has been built and successfully tested with real and simulated data