Kartheek Chandu

Direct multi-bit search (DMS) screen algorithm

Multi-bit screening is an extension of binary screening, in which every pixel in continuous-tone image can be rendered to one among multiple absorptance levels. Many multi-bit screen algorithms face the problem of contouring artifacts due to sudden changes in the majority absorptance level between gray levels. In this paper, we have extended the direct binary search to the multi-bit case where at every pixel the algorithm chooses the best drop absorptance level to create a visually pleasing halftone pattern without any user defined guidance. This is repeated throughout the entire range of gray levels to create a high quality multi-bit screen.

GPU-enabled parallel processing for image halftoning applications

Programmable Graphics Processing Unit (GPU) has emerged as a powerful parallel processing architecture for various applications requiring a large amount of CPU cycles. In this paper, we study the feasibility for using this architecture for image halftoning, in particular implementing computationally intensive neighborhood halftoning algorithms such as error diffusion and Direct Binary Search (DBS). We show that it is possible to deliver very high performance even for high speed printers.

A GPU implementation of color digital halftoning using the Direct Binary Search algorithm

We illustrate how employing Graphics Processing Units (GPU) can speed-up intensive image processing operations. In particular, we demonstrate the use of the NVIDIA CUDA architecture to implement a color digital binary halftoning algorithm based on Direct Binary Search (DBS). Halftoning a color image is more computationally expensive than the single color case as there is a need to minimize dot interaction between different color planes as well. We propose processing all color planes in parallel. In addition we employ processing several non-overlapping neighborhoods in parallel, by utilizing the GPUs parallel architecture, to further improve the computational efficiency. This parallel approach allows us to use a large neighborhood and filter size, to achieve the highest halftone quality, while having minimal impact on performance.

Hybrid halftoning using direct multi-bit search (DMS) screen algorithm

In this paper we propose a mathematical framework for multi-bit aperiodic clustered dot halftoning based on the Direct Multi-bit Search (DMS) algorithm. A pixel validation map is provided to the DMS algorithm to guide the formation of homogeneous clusters. The DMS algorithm operates without any user defined guidance, iteratively choosing the best drop absorptance level. An array of valid pixels is computed after each iteration that restricts the selection of pixels available to the DMS algorithm, improving the dot clustering. This process is repeated throughout the entire range of gray levels to create a visually pleasing multi-bit halftone screen. The resultant mask exhibits smoother appearance and improved detail rendering, compared to conventional clustered dot halftoning. Much of the improvements originate from the improved sampling of the aperiodic hybrid screen designs.

A GPU based implementation of direct multi-bit search (DMS) screen algorithm

In this paper, we study the feasibility for using programmable Graphics Processing Unit (GPU) technology for image halftoning, in particular implementing the computationally intense Direct Multi-bit Search (DMS) Screen algorithm. Multi-bit screening is an extension of binary screening, in which every pixel in continuoustone image can be rendered to one among multiple output states. For example, a 2 bit printer is capable of printing with four different drop sizes. In our previous work, we have extended the Direct Binary Search (DBS) to the multi-bit case using Direct Multi-bit Search (DMS) where at every pixel the algorithm chooses the best drop output state to create a visually pleasing halftone pattern without any user defined guidance. This process is repeated throughout the entire range of gray levels while satisfying the stacking constraint to create a high quality multi-bit screen (dither mask). In this paper, we illustrate how employing Graphics Processing Units (GPU) can speed-up intensive DMS image processing operations. Particularly, we illustrate how different modules can be been parallelized. The main goal of many of the previous articles regarding DBS is to decrease the execution time of the algorithm. One of the most common approaches is to decrease the neighborhood size or filter size. The proposed parallel approach allows us to use a large neighborhood and filter size, to achieve the highest halftone quality, while having minimal impact on performance. In addition, we also demonstrate processing several non-overlapping neighborhoods in parallel, by utilizing the GPUs parallel architecture, to further improve the computational efficiency.

A Riesz energy based approach to generating dispersed dot patterns for halftoning applications

In many halftoning applications there is a need to generate a dispersed pattern of dots that is pleasing to the eye. We propose a method based on Riesz energy minimization that produces superior patterns than other techniques such as Direct Binary Search and k-means. We illustrate the proposed technique and discuss implementation issues including nonlinear programming techniques and memory-constrained implementations.

An uniformity algorithm for high-speed fixed-array printers

In this paper we propose an automated solution that compensates for CMYK inkjet printer output non-uniformities. The solution is applied to a printer employing fixed printhead arrays. The algorithm initially pre-processes scanned image of printed output to isolate the desired region of interest. The region of interest information is utilized to extract non-uniformities across the entire printed area. Finally, the algorithm concludes in a calibration step that enables compensation of the identified non-uniformities and provides the desired tonal target response.

Direct binary search (DBS) algorithm with constraints

In this paper, we describe adding constraints to the Direct Binary Search (DBS) algorithm. An example of a useful constraint, illustrated in this paper, is having only one dot per column and row. DBS with such constraints requires greater than two toggles during each trial operation. Implementations of the DBS algorithm traditionally limit operations to either one toggle or swap during each trial. The example case in this paper produces a wrap-around pattern with uniformly distributed ON pixels which will have a pleasing appearance with precisely one ON pixel per each column and row. The algorithm starts with an initial continuous tone image and an initial pattern having only one ON pixel per column and row. The auto correlation function of Human Visual System (HVS) model is determined along with an initial perceived error. Multiple operation pixel error processing during each iteration is used to enforce the one ON pixel per column and row constraint. The constraint of a single ON pixel per column and row is used as an example in this paper. Further modification of the DBS algorithm for other constraints is possible, based on the details given in the paper. A mathematical framework to extend the algorithm to the more general case of Direct Multi-bit Search (DMS) is presented.