Kasemsan Siri

High-voltage-input, low-voltage-output, series-connected converters with uniform voltage distribution

This paper presents a power system consisting of current-mode, shared-bus converters configured as Series-Input, Parallel-Output (SIPO). These current-mode commercial-off-the-shelf (COTS) dc-dc converters transform a 1kV system input voltage into a 5V output with up to 500 Watts of power. The SIPO power system provides for system expansion and preserves the standalone converters efficiency of over 80%. Uniform input voltage distribution control improves power system reliability by distributing thermal stresses equally among the series-connected converters. Furthermore, robust system stability and uniform input voltage distribution among series-connected converters is realized without control conflict. A computer simulation and an experimental 1 kV 500 W prototype were successfully implemented to validate the uniform voltage distribution power converter architecture.

Voltage-mode grid-tie inverter with active power factor correction

Presented herein is a power and control system architecture of a voltage-mode inverter that is interfaced between a DC power source and an AC utility grid. Utilizing an inverter power stage of a full-bridge switching configuration, the single stage of DC-to-AC power conversion is innovatively controlled to achieve maximum power tracking from the power source and a driving sinusoidal output voltage with a proper phase-shift with respect to the utility grid voltage such that the utility grid current contains no reactive component at the utility grid frequency regardless of the load type (resistive, capacitive, or inductive). In addition to various protection features, a particular novel feature is the harmonic-cancellation capability that eliminates most or all of harmonic content in the inverter output voltage. The overall system of power and control results in either an in-phase (absorbing power) or out-of-phase (providing power) utility-grid current (unity power factor) with respect to the utility grid voltage while absorbing either maximum power available from the DC power source or limiting the delivered AC output power to not exceed either the inverter rated power or the maximum rated output voltage.

Current-sharing among parallel-connected systems of active power factor correction

This paper presents active current-sharing control approaches for parallel-connected AC-to-DC power system architectures consisting of multiple power-processing channels, each of which comprises a cascade connection of a front-end active power factor correction (APFC) stage and an isolated back-end DC-DC converter. 12By employing a current-sharing method to the back-end converters, current-mode commercial-off-the-shelf (COTS) DC-DC converters can provide uniform current-sharing among all power-processing channels while retaining stiff system output voltage regulation without control conflicts among output voltage regulators distributed in the converters. This results in uniform power-sharing among the front-end APFC stages that are connected to either a common AC power source or independent AC power sources that may possess different frequencies of operation (i.e. 50 Hz versus 60 Hz). Through computer simulation and an experimental prototype, current-sharing control for the parallel-connected APFC architectures is validated and successfully applied.

Maximum Power Tracking with Uniform Time Division among distributed power sources

Presented herein is Uniform Time Division (UTD) of Maximum Power Tracking for Distributed-Input Parallel-Output (DIPO) converter power systems. The primary objective of UTD for DIPO converters is to periodically spend equal time in processing maximum power from each of distributed sources using only one MPT non-linear controller. As a result, the UTD-MPT controller sequentially provides equal time intervals of processing maximum power flow from the power sources. Conventionally, the peak values of the distributed source power are concurrently tracked through converters controlled by their own independent MPT controllers without UTD. However, when peak power voltages of distributed power sources are slowly changed as compared to the MPTs response time, such concurrent MPT control for all of the power sources is not necessary. By utilizing UTD of MPT non-linear control, maximum use of available power obtained from each distributed power source is achieved using a single MPT non-linear controller. The resulting system and control architectures offer maximum power transfer with a lower part count. A DIPO power converter bus architecture with a battery-dominated output voltage is described herein. The power and control architectures for DIPO converters are validated through computer simulation for fault-tolerant UTD MPT control.

System Maximum Power Tracking among distributed power sources

Presented herein is Uniform Input Voltage Distribution (UIVD) control for Distributed-Input Series-Output (DISO) converter power systems. The primary control objective of UIVD for DISO converters is to achieve grouped maximum power throughput from non-identical renewable power sources. Secondly, this paper features a revised Maximum Power Tracking (MPT) controller design developed for DISO configurations that facilitate simultaneous processing of distributed power flows. In earlier research, the distributed source peak powers are individually tracked by converters controlled by independent MPT controllers without UIVD. However, when distributed power sources have similar peak power voltages with an achievable tracking efficiency of greater than 96%, such independent MPT controllers are not necessary. By utilizing UIVD control, near-maximum use of available power is achieved using a single MPT controller. The resulting system and control architectures offer near-maximum power transfer with a lower parts count. Two DISO power converter bus architectures are described herein: one having a battery-dominated output voltage and the other with a regulated output voltage. Through computer simulation, both power architectures are validated for fault-tolerant grouped UIVD control.