Katsuhiko Nishiguchi

Fast all-optical switching using ion-implanted silicon photonic crystal nanocavities

On-chip all-optical switching based on the carrier plasma dispersion in an argon ion (Ar+) implanted photonic crystal (PhC) nanocavity that is connected to input/output waveguides is described. A high dose of Ar+ is introduced, and annealing is used to recrystallize the silicon and thus create dislocation loops at the center of the PhC slab. Dislocation loops enable the fast recombination of the carriers, which allows a fast switching recovery time for PhC switches. The switching window (∼70ps) is three times smaller than that without ion implantation, while the required operating energy remains almost the same (<100fJ).

Manipulation and detection of single electrons for future information processing

The ultimate goal of future information processing might be the realization of a circuit in which one bit is represented by a single electron. Such a challenging circuit would comprise elemental devices whose tasks are to drag, transfer, and detect single electrons. In achieving these tasks, the Coulomb blockade, which occurs in tiny conducting materials, plays an important role. This paper describes the current status of research on such single-charge-control devices from the viewpoints of circuit applications.

Nanoampere charge pump by single-electron ratchet using silicon nanowire metal-oxide-semiconductor field-effect transistor

Nanoampere single-electron pumping is presented at 20K using a single-electron ratchet comprising silicon nanowire metal-oxide-semiconductor field-effect transistors. The ratchet features an asymmetric potential with a pocket that captures single electrons from the source and ejects them to the drain. Directional single-electron transfer is achieved by applying one ac signal with the frequency up to 2.3GHz. We find anomalous shapes of current steps which can be ascribed to nonadiabatic electron capture.

Low power and fast electro-optic silicon modulator with lateral p-i-n embedded photonic crystal nanocavity

We have fabricated high-Q photonic crystal nanocavities with a lateral p-i-n structure to demonstrate low-power and high-speed electro-optic modulation in a silicon chip. GHz operation is demonstrated at a very low (microW level) operating power, which is about 4.6 times lower than that reported for other cavities in silicon. This low-power operation is due to the small size and high-Q of the photonic crystal nanocavity.

Nanocrystalline silicon electron emitter with a high efficiency enhanced by a planarization technique

A cold electron emitter has been fabricated based on nanocrystalline silicon (nc-Si) quantum dots formed in the gas phase by very-high-frequency plasma decomposition of SiH4. A small size of less than 10 nm and the spherical shape of the nc-Si dots facilitated the generation of hot electrons. Electrons with kinetic energies higher than the work function of the top electrode were extracted into vacuum through the electrode. A planarization process of the nc-Si layer by annealing enhanced the electron emission efficiency to 5%. Efficiency was optimized by varying the thicknesses of the nc-Si layer, the SiO2 layer, and the top electrode film.

Conductance modulation by individual acceptors in Si nanoscale field-effect transistors

The authors measured low-temperature (6–28K) conductance in nanoscale p-channel field-effect transistors lightly doped with boron. They observed a conductance modulation, which they ascribed to the trapping/detrapping of single holes by/from individual acceptors. The statistics of the appearance of the modulation in a few ten samples indicates that the number of acceptors is small, or even just one, suggesting that what the authors have observed is single-charge-transistor operation by a single-acceptor quantum dot.

Interconnect-free parallel logic circuits in a single mechanical resonator

In conventional computers, wiring between transistors is required to enable the execution of Boolean logic functions. This has resulted in processors in which billions of transistors are physically interconnected, which limits integration densities, gives rise to huge power consumption and restricts processing speeds. A method to eliminate wiring amongst transistors by condensing Boolean logic into a single active element is thus highly desirable. Here, we demonstrate a novel logic architecture using only a single electromechanical parametric resonator into which multiple channels of binary information are encoded as mechanical oscillations at different frequencies. The parametric resonator can mix these channels, resulting in new mechanical oscillation states that enable the construction of AND, OR and XOR logic gates as well as multibit logic circuits. Moreover, the mechanical logic gates and circuits can be executed simultaneously, giving rise to the prospect of a parallel logic processor in just a single mechanical resonator.

Room-temperature-operating data processing circuit based on single-electron transfer and detection with metal-oxide-semiconductor field-effect transistor technology

A single-electron-based circuit, in which electrons are transferred one by one with a turnstile and subsequently detected with a high-charge-sensitivity electrometer, was fabricated on a silicon-on-insulator substrate. The turnstile, which is operated by opening and closing two metal-oxide-semiconductor field-effect transistors alternately, allows single-electron transfer at room temperature owing to electric-field-assisted shrinkage of the single-electron box. It also achieves fast single-electron transfer (less than 10ns) and extremely long retention (more than 104s). We have applied these features to a multilevel memory and a time-division weighted sum circuit for a digital-to-analog converter.

Long Retention of Gain-Cell Dynamic Random Access Memory With Undoped Memory Node

Low current leakage characteristics of a novel silicon-on-insulator (SOI) device are investigated in view of application to a gain-cell dynamic random access memory (DRAM). The device consists of a two-layered poly-Si gate. Since, in this device, the memory node is electrically formed by the gate in undoped SOI wire, no p-n junction is required. The retention is found to be dominated by the subthreshold leakage, which leads to long data retention. The device also achieved a fast (10 ns) writing time and its fabrication process is compatible with those of SOI MOSFETs. The present results, thus, strongly suggest a way of conducting a gain-cell DRAM to be embedded into logic circuits

A silicon nanowire ion-sensitive field-effect transistor with elementary charge sensitivity

We investigate the mechanisms responsible for the low-frequency noise in liquid-gated nanoscale silicon nanowire field-effect transistors (SiNW-FETs) and show that the charge-noise level is lower than elementary charge. Our measurements also show that ionic strength of the surrounding electrolyte has a minimal effect on the overall noise. Dielectric polarization noise seems to be at the origin of the 1/f noise in our devices. The estimated spectral density of charge noise Sq=1.6×10−2 e/Hz1/2 at 10 Hz opens the door to metrological studies with these SiNW-FETs for the electrical detection of a small number of molecules.