Kazuhiko Tokoro

Fabrication of High-Density Wiring Interposer for 10 GHz 3D Packaging Using a Photosensitive Multiblock Copolymerized Polyimide

We have developed a high-density wiring interposer for 10 GHz 3D packaging using a photosensitive multiblock copolymerized polyimide. This new polyimide can realize micron-sized fine patterns without pattern shrinkage because of the nonrequirement of high-temperature thermal curing. The polyimide has good electric properties such as high breakdown voltage and low dielectric constant. Therefore, it is considered that by introducing this photosensitive polyimide as an insulator of the interposer, a high-performance interposer for LSI packaging can be realized. We confirmed experimentally that the high-density wiring interposer can be fabricated using the polyimide and gold. We optimized the basic properties of the photosensitive polyimide film for the fabrication of the interposer. Fine metal wirings were smoothly covered by the polyimide, as confirmed by scanning electron microscopy (SEM) of the cross section of the fabricated balance pair strip line structure. From the time domain reflectometry (TDR) measurement, it was determined that the characteristic impedance of the strip line is within 55.2 Ω ± 11.5% at the center of the interposer chip.

New fabrication process for Josephson tunnel junctions using photosensitive polyimide insulation layer for superconducting integrated circuits

Photosensitive polyimide, synthesized by block copolymerization, is expected to be an excellent insulation layer in LSI circuits in the future. This polyimide has a higher thermal resistance than those of the other organic polymers. It also has good electric properties such as a high break down voltage and a low dielectric constant. We propose a new fabrication process for the Josephson tunnel junction using a photosensitive polyimide. It is possible to simplify the fabrication process of the Josephson tunnel junction, because the photosensitive polyimide is used as the insulation layer instead of conventional inorganic insulation films without an etching process. We fabricated Nb/Al-AlOx/Nb Josephson tunnel junctions using this new process. The junctions show excellent current-voltage (I-V) characteristics with V/sub m/ values more than 80 mV.

Ultra-High-Speed Signal Propagation of High-Density Wiring Interposer for 3D Packaging

We have demonstrated a high-density wiring interposer for 10 GHz 3D LSI packaging using a photosensitive multiblock copolymerized polyimide. We confirmed experimentally that the high-density wiring interposer could be fabricated using the polyimide and the gold metal. From the time domain reflectometry (TDR) measurement using a specially prepared 20-µm-pitch microwave contact probe, the characteristic impedance of a 12.5-µm-wide 12.4-mm-long strip-line was determined to be within 55.2 Ω ± 11.5 % at the central 10-mm-square area of the interposer. From the highresolution time domain transmission (TDT) measurement, the insertion loss (S-parameter: S21) of -5.5 dB at 10 GHz was calculated through the strip-line. Finally, we confirmed eye diagram measurement at 10 Gbps through the strip-line on the fabricated interposer. The aperture size of the measured eye diagram at 5 Gbps was sufficiently for signal propagation.

10-Gbps signal propagation of high-density wiring interposer using photosensitive polyimide for 3D packaging

We have developed a high-density wiring interposer for 10-Gbps signal propagation using a photosensitive polyimide. We optimized the basic properties of the photosensitive polyimide film for the fabrication of the interposer. We experimentally confirmed that the high-density wiring interposer could be fabricated using the optimized polyimide and gold multilayered structure. Fine metal wirings were smoothly covered by the polyimide film, as confirmed by scanning electron microscopy (SEM) of the cross section of the fabricated balanced pair strip-line structure. From the high-resolution differential time domain reflectometry (TDR) measurement, the differential impedance Zdiff of a 12.5-mum-wide 12.4-mm-long balanced-pair strip-line was evaluated to be within 100 Omega plusmn 14.6 %. From the high-resolution differential time domain transmission (TDT) measurement, an insertion loss (S-parameter: S dd21) of -2.96 dB at 10 GHz through the differential strip-line was evaluated. Finally, we confirmed eye diagram measurement at 10 Gbps through the differential strip-line on the fabricated interposer. The aperture size of the measured eye diagram at 10 Gbps was sufficient for ultrahigh-speed signal propagation

Double relaxation oscillation SQUID with a 4JL on-chip digital flux locked-loop circuit

Double relaxation oscillation SQUID (DROS) combined with an on-chip superconducting digital flux locked-loop (FLL) circuit has been proposed. In this study, we described superconducting digital FLL circuit which consists of an 8-bit up/down counter and an 8-bit R-2R ladder D/A converter. The circuit was designed using 4-Junction Logic (4JL)-gates which are driven by a two phase power supply. In the up/down counter, we employed binary carry lookahead (BCL) circuits for high-speed operation. Logic simulations for the BCL 8-bit up/down counter showed correct operation up to 4 GHz, assuming a 2.5 kA/cm/sup 2/ Nb/Al-AlO/sub x//Nb junction technology. From simulation results high slew rate of 10/sup 7//spl Phi//sub 0//s and dynamic range of 2.5/spl Phi//sub 0/ can be expected.

A GHz multi-channel cryogenic test fixture for superconducting integrated circuit testing

We have designed a cryogenic test fixture for functional testing of digital and analogue superconducting integrated circuits (IC) in the GHz frequency range. The test fixture consists of a ball grid array (BGA) chip carrier, a detachable BGA socket, a coaxial printed wiring board, and 40 long coaxial cables with SMA connectors. The chip carrier has a microstrip wiring and solder balls. On the chip carrier, a superconducting IC chip is connected using Al wire bonding. The wiring board has a coaxial wiring structure. The wiring characteristic impedance of the chip carrier and the print wiring board was designed to be 50 /spl Omega/. In the BGA socket, the BGA chip carrier is electrically connected to the printed wiring board using anisotropic conductive rubber sheet. The coaxial cables are connected to the printed wiring board with soldering. All parts of the system were made with nonmagnetic materials. The high frequency characteristics were partially evaluated by TDR measurement and vector impedance measurement at 4.2 K, 77 K and room temperature.

Effect of amide bond in gate dielectric polymers on memory performance of organic field-effect transistors

We demonstrated organic field-effect transistors (OFETs) using nylon 11, poly(γ-methyl-l-glutamate) (PMLG), and poly(e-benzyloxycarbonyl-l-lysine) [Plys(z)] as gate dielectrics. By a Fourier-transform IR (FT-IR) measurement, the secondary structure of nylon 11 was determined to be a β-sheet, and those of PMLG and Plys(z) have an α-helix. The orientation of the α-helix of PMLG and Plys(z) and its crystallinity were determined by FT-IR and X-ray diffraction (XRD) measurements, respectively. The OFET using nylon 11 showed no hysteresis in the transfer characteristic (on/off ratio is 1.2). In contrast, OFETs using PMLG and PLys(z) showed hysteresis and it operated as ferroelectric memories (on/off ratios are 2.2 × 104 and 53, respectively). This difference is attributed to the difference in the secondary structure and the crystal system. The memory retention property in OFETs using PMLG and PLys(z) suggested that high crystallinity of the film and highly ordered dipoles are not necessary for the memory retention.

Efficient fabrication process for superconducting integrated circuits using photosensitive polyimide insulation layers

Photosensitive polyimide insulation layers have been introduced to fabricate superconducting integrated circuits. It is shown to simplify the fabrication process, because the photosensitive polyimide insulation layer can be patterned by conventional photolithography process, resulting in the etching process unnecessary in the present new fabrication process. Three kinds of contact hole (junction top electrode contact, junction base electrode contact, and resistor contact) are simultaneously formed in the photolithography process of the polyimide. A minimum contact hole size is designed to be 1.5 /spl mu/m square for a 3 /spl mu/m /spl times/ 3 /spl mu/m squared junction. Superconducting current density of 2.4/spl times/10/sup 6/ A/cm/sup 2/ of the contact hole was measured. Palladium resistors were successfully made with through hole contacts of the photosensitive polyimide insulation layer. We demonstrated superconducting integrated circuits using this new fabrication process including the minimum 3 /spl mu/m /spl times/ 3 /spl mu/m squared Nb/Al-AlO/sub x//Nb Josephson tunnel junction. The circuit operation is also demonstrated in the fabricated superconducting integrated circuits with the photosensitive polyimide insulation layers.

Ultra wide bandwidth performance of high-density wiring interposer for 3D packaging

We have demonstrated a high-density wiring interposer for 10 GHz 3D packaging using a photosensitive multiblock copolymerized polyimide. This new polyimide can realize micron-sized fine patterns without the pattern shrinkage because of not requiring high-temperature thermal curing. The polyimide has good electric properties such as high breakdown voltage and low dielectric constant. Therefore, it is considered that by introducing this photosensitive polyimide as an insulator of the interposer, a high-performance interposer for LSI packaging can be realized. We confirmed experimentally that the high-density wiring interposer could be fabricated using the polyimide and the gold metal. From time domain reflectometry (TDR) measurement by using a specially prepared 20-/spl mu/m-pitch microwave contact probe, it was found that the characteristic impedance of the stripline is within 55.2 /spl Omega//spl plusmn/11.5 % at the central 10-mm-square area of the interposer.

Fabrication of copper wiring by micro-contact printing method and electroless plating and electroplating

A micro-contact printing (µCP) method has been applied to the fabrication of microstructures and electronics. We have successfully fabricated a copper wiring structure on flexible substrates using a combination of µCP, electroless plating, and electroplating. A nucleating agent ink pattern was printed by µCP onto polyethylene terephthalate, and polyethylene naphthalate. Nickel and copper thin films were electrolessly plated onto the pattern, and used as a conductive layer for subsequent copper electroplating. Copper wiring structures with a half-pitch of a 100 µm and a 250 µm line-and-space pattern, were successfully produced on flexible films at temperatures below 100 °C.