Kazuhisa Haeiwa

Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing—Part I: Addition, Approximate Transcendental Functions, and Log-Domain Operations

We construct arithmetic modules for signal processing with sigma-delta modulated signal form which has advantage in signal quality over other pulsed signal forms. In the first part of this paper, adders and exponential function modules are presented first and secondly. By utilizing the two modules, several transcendental functions including hyperbolic and logarithmic functions are constructed. The exponential functions and logarithmic functions provide log-domain arithmetic operations including multiplication, division, and power functions. Only two bit-manipulations, bit-permutation with sorting networks and bit-reversal with NOT gates, have built up all the arithmetic operations on any form of sigma-delta modulated signals. These modules, together with algebraic functions to be presented in the second part of this paper, organize an extensive module library for the sigma-delta domain signal processing.

Sorter-based sigma-delta domain arithmetic circuits

This paper describes adder and multiplier circuits operating directly on first-order multi-level and second-order binary sigma-delta modulated signals. We first show that binary sorting networks with delayed feedback loops can be used as discrete variable digital sigma-delta modulators. We then build the adders based on the sorting networks. The circuit design scheme for the adder is independent of quantization spacing and the number of inputs. We build the multiplier simply by using the adders and exclusive-OR gates. The adders and the multipliers can be built of smaller number of logic gates and perform more precise arithmetic operation at a high oversampling ratio than multi-bit Nyquist rate circuits.

Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing—Part II: Multiplication and Algebraic Functions

We construct arithmetic modules for signal processing with sigma-delta modulated signal form which has advantage in signal quality over other pulsed signal forms. In the second part of this paper, multi-input multipliers are presented first. Secondly, dividers and square root function modules with the multiplier on their internal feedback path are constructed. Combined use of the multipliers, dividers, and the square root functions creates various algebraic functions including polynomial and rational functions. Only two bit-manipulations, bit-permutation with sorting networks and bit-reversal with NOT gates, have built up all the algebraic operations on any form of SD modulated signals. These modules, together with transcendental functions presented in the first part of this paper, organize an extensive module library for the sigma-delta domain signal processing. The multiplier output contains noise components which originate from quantization. The noise power can decrease in exchange for circuit complexity. A time-division multiplexing technique based on N-tone sigma-delta modulation is applied to the multipliers for reducing the complexity. Signal processing circuits built of nanometer-scale quantum effect devices must be equipped with fault tolerance of transient device error. By computer simulation of a multiplier built of single-electron tunneling devices, we found that the multiplier decreased its output SNDR from 43 to 27 dB at an OSR of 28 as the device error rate increased from 0 to 10-3. However, the multiplier was never functionally failed during the simulation.

RF Energy Harvesting and Charging Circuits for Low Power Mobile Devices

The electrical power generated by RF energy harvesting techniques is small, depending on techniques it is enough to drive low power consumption devices. Therefore, it is possible to increase the battery life and to reduce the environmental pollution. In this paper, we focus on the RF energy harvesting and design the rectenna with a 4×4 patch antenna of 2.13 GHz for low power mobile devices. The rectenna element is a microstrip patch antenna with PTFT board of 10 dielectric constant and 1.6 mm thick that has a gain of 5.8dBi. A step-up converter is adopted the Texas Instruments TPS61220. The step-up converter is operated with load at 0.7V to 5.5V. If the output current is 1.7mA, the conversion efficiency shows 80.9%. From the evaluated results of RF energy harvesting system, the low power mobile devices such as Zigbee when we set the distance of 12m can be operated

Performance enhancement of TFI-OFDM with path selection based channel identification

Recently time-frequency interferometry (TFI)-OFDM has been proposed as a channel identification scheme. TFI-OFDM system can multiplex the same impulse response in twice on the time domain without overlapping to each other. In this case, the required pilot signal is only one. Moreover, by averaging of these impulse responses, the accurated channel impulse responses are obtained. However, if the total channel paths are reduced, the performance might be degraded. This is because the channel identification of TFI-OFDM is operated with averaging the selected spectrum signals from the time windows. For the case with reduced channel paths, the selected time spectrum signals include the noise terms. By applying the FFT operation, these noise terms are spread in the frequency domain. In this case, the channel identification is poorly operated due to the noise. To reduce this problem, in the paper, we propose the channel identification method with path selection for performance enhancement of TFI-OFDM.

Single-Electron Arithmetic Circuits for Sigma-Delta Domain Signal Processing

This paper presents single-electron arithmetic circuits for sigma-delta domain signal processing. Sigma-delta domain signal processing is one of hardware architectures which have tolerance for transient device errors. Results of circuit simulation show that the errors never trigger out-of-control state of the circuits and random surge of their outputs.

Piecewise linear circuits operating on first-order multi-level and second-order binary sigma-delta modulated signals

This paper describes piecewise linear circuits operating directly on first-order multi-level and second-order binary sigma-delta modulated signals. The sigma-delta modulated signal sequences contain subsequences which reflect whether the inputs to sigma-delta modulators are positive or negative. We build circuits performing absolute operation with detectors of the subsequences. Using the absolute circuits, we build various piece- wise linear circuits, such as Min/Max circuits. These piecewise linear circuits can be built of a smaller number of logic gates and perform more precise piecewise linear operation at a high oversampling ratio than multi-bit Nyquist rate circuits.

Time-frequency interferometry for OFDM

In OFDM systems, the pilot signal averaging channel estimation is generally used to identify the channel state information (CSI). In this case, large pilot symbols are required for obtaining an accurate CSI. As a result, the total transmission rate is degraded due to large number of pilot symbols transmission. To reduce this problem, in this paper, we propose time-frequency interferometry (TFI) for OFDM to achieve an accurate CSI. TFI- OFDM can multiplex the same impulse responses in twice on the time domain without overlapping to each other. By averaging of these impulse responses, we can obtain the accurate channel impulse response.

Interference cancellation using replica signal for HTRCI-MIMO/OFDM in time-variant large delay spread longer than guard interval

Orthogonal frequency division multiplexing (OFDM) and multiple-input multiple-output (MIMO) are generally known as the effective techniques for high data rate services. In MIMO/OFDM systems, the channel estimation (CE) is very important to obtain an accurate channel state information (CSI). However, since the orthogonal pilot-based CE requires the large number of pilot symbols, the total transmission rate is degraded. To mitigate this problem, a high time resolution carrier interferometry (HTRCI) for MIMO/OFDM has been proposed. In wireless communication systems, if the maximum delay spread is longer than the guard interval (GI), the system performance is significantly degraded due to the intersymbol interference (ISI) and intercarrier interference (ICI). However, the conventional HTRCI-MIMO/OFDM does not consider the case with the time-variant large delay spread longer than the GI. In this paper, we propose the ISI and ICI compensation methods for a HTRCI-MIMO/OFDM in the time-variant large delay spread longer than the GI.

Power Consumption for Coherent Optical Orthogonal Frequency Division Multiplexing With Punctured LDPC Codes and Variable Amplitude Block Codes

Recently, coherent optical OFDM (CO-OFDM) has been proposed in optical network to combat chromatic dispersion. CO-OFDM system has been successfully processed and recovered for transmitted signals without chromatic dispersion compensation. However, in optical links, the available optical power is limited due to safety and power consumption. Therefore, in this paper, we focus on the minimizing the optical power and proposed the CO-OFDM with punctured LDPC codes and variable amplitude block codes.