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Kazumasa Nawata

Fujitsu

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Publication

Featured researches published by Kazumasa Nawata.

Archive | 1978

Large scale semiconductor integrated circuit device

Kenichi Ohno; Tohru Hosomizu; Kazumasa Nawata

Archive | 1984

Inner bias circuit for generating ECL bias voltages from a single common bias voltage reference

Kazumasa Nawata; Yasunori Kanai

Archive | 1982

Bias circuit with voltage and temperature compensation for an emitter coupled logic circuit

Yasunori Kanai; Eiji Sugiyama; Kazumasa Nawata

Archive | 1989

ECL gate array semiconductor device with protective elements

Yasunori Kanai; Kazumasa Nawata; Mitsuhisa Shimizu; Toshiaki Sakai

Archive | 1990

ECL latch circuit having a noise resistance circuit in only one feedback path

Yasunori Kanai; Kazumasa Nawata; Mitsuhisa Shimizu; Hiroki Yada; Taichi Saitoh; Toshiaki Sakai

symposium on vlsi technology | 1985

A New Isolation Technology for Bipolar VLSI Logic (IOP-L)

Hiroshi Goto; Tadakazu Takada; Kazumasa Nawata; Yasunori Kanai

Archive | 1984

SEMICONDUCTOR DEVICE WITH PROTECTIVE ELEMENTS

Yasunori Kanai; Kazumasa Nawata; Mitsuhisa Shimizu; Toshiaki Sakai

Archive | 1992

Logic circuit having sharper falling edge transition

Hiroyuki Tsunoi; Kazumasa Nawata; Toshiaki Sakai; Hiroki Yada; Hisayosi Ooba; Takayuki Tsuru; Satoru Sudo; Taichi Saitoh

Archive | 1991

A LOGIC CIRCUIT

Hiroyuki Tsunoi; Kazumasa Nawata; Toshiaki Sakai; Hiroki Yada; Hisayosi Ooba; Takayuki Tsuru; Satoru Sudo; Taichi Saitoh

Archive | 1984

ECL gate array with collector resistance compensation for distance from power supply pad

Yasunori Kanai; Kazumasa Nawata; Mitsuhisa Shimizu

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Yasunori Kanai

Fujitsu

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Mitsuhisa Shimizu

Fujitsu

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Toshiaki Sakai

Fujitsu

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Hiroki Yada

Fujitsu

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Taichi Saitoh

Fujitsu

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Hiroyuki Tsunoi

Fujitsu

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Hisayosi Ooba

Fujitsu

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Satoru Sudo

Fujitsu

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Takayuki Tsuru

Fujitsu

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Eiji Sugiyama

Fujitsu

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