Kazutoshi Torashima

CMUT fabrication based on a thick buried oxide layer

We introduce a versatile fabrication process for direct wafer-bonded CMUTs. The objective is a flexible fabrication platform for single element transducers, 1D and 2D arrays, and reconfigurable arrays. The main process features are: A low number of litho masks (five for a fully populated 2D array); a simple fabrication sequence on standard MEMS tools without complicated wafer handling (carrier wafers); an improved device reliability; a wide design space in terms of operation frequency and geometric parameters (cell diameter, gap height, effective insulation layer thickness); and a continuous front face of the transducer (CMUT plate) that is connected to ground (shielding for good SNR and human safety in medical applications). All of this is achieved by connecting the hot electrodes individually through a thick buried oxide layer, i.e. from the handle layer of an SOI substrate to silicon electrodes located in each CMUT cell built in the device layer. Vertical insulation trenches are used to isolate these silicon electrodes from the rest of the substrate. Thus, the high electric field is only present where required — in the evacuated gap region of the device and not in the insulation layer of the post region. Array elements (1D and 2D) are simply defined be etching insulation trenches into the handle wafer of the SOI substrate.

Torsional mirror with X-shaped cross-sectional torsional beam

The development of a MEMS torsional mirror with X-shaped cross-sectional torsional beam is presented in this paper. The torsional resonant mode of the torsional mirror was designed to be the lowest resonant mode. Therefore, vertical and horizontal movements of the mirror were reduced. This torsional mirror has been fabricated using anisotropic etching from both sides of Si (100) wafer.