Keith P. Hilton

High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications

This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230 cm2/V-s. The shortest 40 nm gate length (LG) transistors achieve peak transconductance (Gm) of 510 muS/mum and cut-off frequency (fT) of 140 GHz at supply voltage of 0.5V. These represent the highest Gm and fT ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET.

Integrated micro-Raman/infrared thermography probe for monitoring of self-heating in AlGaN/GaN transistor structures

Self-heating in AlGaN/GaN device structures was probed using integrated micro-Raman/Infrared (IR) thermography. IR imaging provided large-area-overview temperature maps of powered devices. Micro-Raman spectroscopy was used to obtain high-spatial-resolution temperature profiles over the active area of the devices. Depth scans were performed to obtain temperature in the heat-sinking SiC substrate. Limitations in temperature and spatial resolution, and relative advantages of both techniques are discussed. Results are compared to three-dimensional finite-difference simulations

85nm gate length enhancement and depletion mode InSb quantum well transistors for ultra high speed and very low power digital logic applications

We demonstrate for the first time 85nm gate length enhancement and depletion mode InSb quantum well transistors with unity gain cutoff frequency, fT, of 305 GHz and 256 GHz, respectively, at 0.5V VDS, suitable for high speed, very low power logic applications. The InSb transistors demonstrate 50% higher unity gain cutoff frequency, fT, than silicon NMOS transistors while consuming 10 times less active power

Measurement of temperature distribution in multifinger AlGaN/GaN heterostructure field-effect transistors using micro-Raman spectroscopy

The temperature distribution in multifinger high-power AlGaN/GaN heterostructure field-effect transistors grown on SiC substrates was studied. Micro-Raman spectroscopy was used to measure channel temperature with 1 μm spatial resolution, not possible using infrared techniques. Thermal resistance values were determined for four different device layouts with varying number of fingers, finger width, and spacing. The experimental thermal resistance was in fair agreement to that predicted by three-dimensional finite difference heat dissipation simulations. Uncertainties in thermal properties of this device system made simulation less reliable than experiment.

Thermal Boundary Resistance Between GaN and Substrate in AlGaN/GaN Electronic Devices

The influence of a thermal boundary resistance (TBR) on temperature distribution in ungated AlGaN/GaN field-effect devices was investigated using 3-D micro-Raman thermography. The temperature distribution in operating AlGaN/GaN devices on SiC, sapphire, and Si substrates was used to determine values for the TBR by comparing experimental results to finite-difference thermal simulations. While the measured TBR of about 3.3 x 10^-8 W^-1 ldr m² ldr K for devices on SiC and Si substrates has a sizeable effect on the self-heating in devices, the TBR of up to 1.2 x 10^-8 W^-1 ldr m² ldr K plays an insignificant role in devices on sapphire substrates due to the low thermal conductivity of the substrate. The determined effective TBR was found to increase with temperature at the GaN/SiC interface from 3.3 x 10^-8 W^-1 ldr m² ldr K at 150degC to 6.5 x 3.3 x 10^-8 W^-1 ldr m² ldr K at 275degC, respectively. The contribution of a low-thermal-conductivity GaN layer at the GaN/substrate interface toward the effective TBR in devices and its temperature dependence are also discussed.

Piezoelectric strain in AlGaN/GaN heterostructure field-effect transistors under bias

Micro-Raman spectroscopy was used to study piezoelectric strain in AlGaN∕GaN heterostructure field-effect transistors under bias. The measurements were made through the transparent SiC substrate. Strain in the GaN layer varied over the device area and was dependent on bias voltage, and affected, in particular, the gate-drain gap and area underneath the drain contact. The observed strain in GaN was shown to be related to the electric field component normal to the surface. Finite element simulations of electric field distribution show good qualitative agreement with the experimental data. Effects of strain on Raman temperature measurements in transistors are also discussed.

Time-Resolved Temperature Measurement of AlGaN/GaN Electronic Devices Using Micro-Raman Spectroscopy

We report on the development of time-resolved Raman thermography to measure transient temperatures in semiconductor devices with submicrometer spatial resolution. This new technique is illustrated for AlGaN/GaN HFETs and ungated devices grown on SiC and sapphire substrates. A temporal resolution of 200 ns is demonstrated. Temperature changes rapidly within sub-200 ns after switching the devices on or off, followed by a slower change in device temperature with a time constant of ~10 and ~140 mus for AlGaN/GaN devices grown on SiC and sapphire substrates, respectively. Heat diffusion into the device substrate is also demonstrated

Micro-Raman temperature measurements for electric field assessment in active AlGaN-GaN HFETs

Temperature profiles in the source/drain (S/D) opening of a single finger AlGaN-GaN heterostructure field-effect transistor were studied at increasing S/D voltages by micro-Raman spectroscopy with <1 /spl mu/m spatial resolution. These profiles imply high field regions near the gate edge of length /spl sim/0.4 /spl mu/m for S/D voltages between 45 and 75 V. Electric field strengths of /spl sim/1.2 and /spl sim/1.9 MV/cm are estimated for 45 and 75 V S/D voltage. The experimental results are in excellent agreement with 2-D Monte Carlo simulations.

Novel InSb-based quantum well transistors for ultra-high speed, low power logic applications

InSb-based quantum well field-effect transistors, with gate length down to 0.2 /spl mu/m, are fabricated for the first time. Hall measurements show that room temperature electron mobilities over 30,000 cm /sup 2/V/sup -1/s/sup -1/ are achieved with a sheet carrier density over 1/spl times/10/sup 12/ cm/sup -2/ in a modulation doped InSb quantum well with Al/sub x/In/sub 1-x/Sb barrier layers. Devices with 0.2 /spl mu/m gate length and 20% Al barrier exhibit DC transconductance of 625 /spl mu/S//spl mu/m and f/sub T/ of 150 GHz at V/sub DS/ =0.5V. 0.2 /spl mu/m devices fabricated on 30% Al barrier material show DC transconductance of 920 /spl mu/S//spl mu/m at V/sub DS/ = 0.5 V. Benchmarking against state-of-the-art Si MOSFETs indicates that InSb QW transistors can achieve equivalent high speed performance with 5-10 times lower dynamic power dissipation and therefore are a promising device technology to complement scaled silicon-based devices for very low power, ultra-high speed logic applications.

Analysis of DC–RF Dispersion in AlGaN/GaN HFETs Using RF Waveform Engineering

This paper describes how dc-radio-frequency (RF) dispersion manifests itself in AlGaN/GaN heterojunction field-effect transistors when the devices are driven into different RF load impedances. The localized nature of the dispersion in the I-V plane, which is confined to the ldquokneerdquo region, is observed in both RF waveform and pulsed I-V measurements. The effect is fully reproduced using 2-D physical modeling. The difference in dispersive behaviors has been attributed to the geometry of a trap-induced virtual-gate region and the resulting carrier velocity saturation being overcome by punchthrough effects under high electric fields.