Ken T. Short

Propagation of picosecond electrical pulses on a silicon‐based microstrip line with buried cobalt silicide ground plane

A microstrip line with a highly conducting cobalt silicide (CoSi2) ground plane buried 7 μm below the surface of a single‐crystal silicon wafer is presented. This new transmission line shows significantly reduced dispersion up to 100 GHz bandwidth compared to a conventional microstrip line with the ground plane on the back of the substrate, while being able to support active devices in the silicon dielectric. After propagating 5 mm, the rise time (10%–90%) of an electrical pulse increases only from 2.5 to 3.7 ps as opposed to an increase from 2.7 to 11.3 ps on a conventional microstrip line.

Formation of cobalt silicide in Co+ implanted Si(111)

The microstructural variation of CoSi2 buried layers formed by 100 keV Co+ implantation at 350u2009°C into Siu2009(111) is systematically studied. The critical dose dc of Co+ implantation at 100 keV required to form a continuous CoSi2 buried layer after annealing is the same in both Siu2009(111) and (001), ≊1.1×1017 cm−2, corresponding to a threshold peak concentration of 18.5 at.u2009% Co. In addition, we observe continuous buried layers consisting of both A‐(fully aligned) and B‐(twinned) CoSi2 grains in the (111) samples implanted at doses ≊ dc. The relative fractions of A and B are found to vary with the implanted doses, current densities of the ion beam, and annealing conditions with the B fractions varying from 0% to 100%. Continuous A‐type layers are formed only in the samples implanted to doses ≥1.6×1017 cm−2.

Transport in submicrometer buried mesotaxial cobalt silicide wires

We describe the formation of narrow (down to 130 nm) buried CoSi2 wires by implantation of Co ions through an oxide mask into a Si wafer followed by annealing. Fabrication of free‐standing wires is also demonstrated. The temperature dependence of the four‐terminal resistance from 4 to 600 K shows that these wires are good metals, very similar to wider layers. Measurements at high current density and temperature suggest that the wires may be robust with respect to electromigration damage.

30 nm CoSi2 surface layers for contact metallization in complementary metal-oxide-semiconductor processes

Thin, low resistivity CoSi2 and TiSi2 surface layers have been realized through room‐temperature ion implantation of Co+ and Ti+, respectively, followed by low‐temperature annealing. TEM studies show that the layers are polycrystalline with large, uniformly thick grains. The results of leakage current measurements performed on junctions fabricated with and without CoSi2 surface layers illustrate the potential of this technique for contact metallization in sub‐half‐micron CMOS processes.

Evolution of Buried Cobalt Silicide Layers Formed by Co Implantation in Si(111)

Coalescence and microstructure of buried CoSi 2 layers formed by 100 keV Co + implantation at 350°C into Si(111) are studied. Doses ranged from 1×10 16 to 1.6×l0 17 cm −2 . The critical dose (d c ) required to form a continuous layer is found to be the same, 1.1±0.1×l0 17 cm −2 , in both (111) and (001) substrates, despite pronounced differences in precipitate morphology. Three types of precipitates are observed in Si(111) during the mesotaxial process: A–type (fully aligned), B 0 –type (twinned on the (111) plane parallel to the surface), and B 1,2,3 –type (twinned on one of the three (111) planes inclined to the surface). The fraction of each varies with both the implantation and annealing conditions. Formation of a continuous, twinned (B 0 –type), buried layer after 1000°C annealing is shown to be possible for the first time by this synthesis technique in samples implanted at d c .