Kenji Kotani
Tohoku University
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Featured researches published by Kenji Kotani.
IEEE Transactions on Electron Devices | 2004
Masaki Yanagisawa; Kenji Kotani; Takeshi Kawasaki; Ryuji Yamabi; Seiji Yaegassi; Hiroshi Yano
A simple InP-based heterojunction bipolar transistors (HBT) fabrication process featuring high uniformity and high reproducibility is introduced. No dry etching method was utilized for triple-mesa formation to avoid plasma damage to the device surface. An all-wet etching method was specially developed. This process is relatively simple compared to the conventional HBT fabrication process with respect to the emitter mesa formation by one-step selective etching. Uniformity of the current gain over a 3-in diameter wafer was approximately 2.9%, and the variation of the current gain of 17 wafers was 2.9 (max.-min.). The current gain cutoff frequency and the maximum oscillation frequency were 145 and 174 GHz, respectively. The mean time to failure was over 5 /spl times/ 10/sup 6/ h at 150/spl deg/ C whose criterion was over 3% changes in the current gain. This process is suitable for mass production of ultrahigh speed ICs in high yield.
international conference on indium phosphide and related materials | 2003
Ryuji Yamabi; Kenji Kotani; Takeshi Kawasaki; M. Yanagisawa; Seiji Yaegassi; Hiroshi Yano
We have fabricated InGaAs/InP HBTs with an InP passivation structure and characterized reliability. Life tests of the HBTs under a collector current density of 100 kA/cm/sup 2/ were carried out at junction temperatures of 255/spl deg/C and 280/spl deg/C. The HBTs have shown a low emitter-base current and stable characteristics in the life tests compared with HBTs without the InP passivation structure. The variations of current gain and turn-on voltage at a collector current density of 100 kA/cm/sup 2/ are within -7% and -1%, respectively, after 4,411 hours in the life test of 255/spl deg/C. We have obtained the activation energy of 1.5 eV and the mean time to failure of 5 /spl times/ 10/sup 6/ hours at a junction temperature of 150/spl deg/C, which is sufficient for practical applications.
Japanese Journal of Applied Physics | 2003
Kenji Kotani; Ryuji Yamabi; Takeshi Kawasaki; Masaki Yanagisawa; Seiji Yaegassi; Hiroshi Yano
We have developed the InGaAs/InP heterojunction bipolar transistor (HBT) fabrication process technology, which is capable of producing multiplexer/demultiplexer-level ICs in high yield. A simple self-aligned process utilizing an overhung profile of an InGaAs emitter contact mesa enables narrow separation between the emitter contact mesa and base electrodes. With this fabrication process, we have obtained very high uniformity of HBT characteristics. The uniformity was evaluated by measuring HBT arrays consisting of two-dimensionally arranged 26×57 (1,482) HBTs. The average DC current gain at a collector current density of 1.0×105 A/cm2 is 37.8 and the standard deviation is only 4.7%. A current gain cut-off frequency, fT, of 190 GHz and a maximum oscillation frequency, fmax, of 280 GHz at a collector current, Ic, of 17 mA were achieved with a 0.8×5.8 µm2 emitter HBT. The uniformity of RF properties was also excellent. The average fT and fmax of the HBTs with a 0.8×5.8 µm2 emitter contact mesa at Ic of 15 mA were 190 GHz and 256 GHz, and the standard deviations were 1.6% and 2.3%, respectively.
international conference on indium phosphide and related materials | 2004
Kenji Kotani; Takeshi Kawasaki; Tomihito Miyazaki; Seiji Yaegassi; Hiroshi Yano
We have successfully demonstrated a high etch rate and low temperature backside via etching into InP using HI-based ICP. An average InP etch rate of 2.0 /spl mu/m/min at a wafer temperature of 130 /spl deg/C was obtained. Using this etching, 80 /spl mu/m diameter backside vias were formed into 100 /spl mu/m thick InP with a simple process. The vias show good profile and smooth surface over a 3-inch diameter wafer. From s-parameter measurements, the average via inductance of 12.1 pH was extracted and the inductance coincides with a calculated value. To evaluate reliability, a heat cycle test under a condition of temperature cycling from 150/spl deg/C to -65/spl deg/C was carried out. After testing of 100 cycles, all vias satisfied the test requirements. These results show that our InP backside via process is promising for practical applications.
Japanese Journal of Applied Physics | 1998
Kazuhiko Yamanouchi; Kenji Kotani; Hiroshi Yao
The optical fiber acoustooptic phase modulator offers the advantages of small size, light weight and low diffraction and optical coupling loss. In this paper, we present the fabrication process and results of our proposed device. A ZnO thin-film bulk acoustic wave transducer was fabricated on a glass substrate which was then bonded on the optical fiber. We experimentally obtained an amplitude-modulated lightwave signal with an input of 9 V at 94 MHz with our measurement system.
Japanese Journal of Applied Physics | 2000
Kazuhiko Yamanouchi; Kenji Kotani; Hiroyuki Odagawa; Yasuo Cho
Among the important properties required for surface acoustic waves (SAW) substrates are a large electromechanical coupling coefficient (k2), small temperature coefficient of frequency (TCF) and low propagation loss. The LiNbO3 and LiTaO3 have good properties as the SAW substrates with a large size. Unfortunately, these possess the defect of having large values of TCF. In this paper, SAW-bonded composite substrates with a large k2, small TCF, low propagation loss and no dispersion using conventional bonders are investigated theoretically and experimentally. The propagation characteristics of SAWs under strained piezoelectric crystals using the higher-order elasticity theory have been analyzed. The theoretical results show zero TCF on LiNbO3/SiO2 substrates. The experimental results for LiNbO3/glass substrates revealed a TCF of [-19 ppm/°C]. The propagation properties were almost the same as those of the single crystal.
bipolar/bicmos circuits and technology meeting | 2013
Masaki Yanagisawa; Masataka Watanabe; Takeshi Kawasaki; Hirohiko Kobayashi; Kenji Kotani; Ryuji Yamabi; Yasuhiro Tosaka; Daiji Fukushi
The authors have succeeded in making a robust fabrication process applied to InP-based double heterojunction bipolar transistors. The process, featuring all-wet etching method for formation of triple-mesa structure, has shown markedly high reproducibility and reliability. The variation of the current gain has been 4.6% through 130 wafers, and the mean time to failure at the junction temperature of 100°C has been longer than 4 × 106 hours, whose criterion is a 5% change in current gain. These excellent results show that our structure of DHBT, which has an InP passivation layer on the surface of the base layer, and our all-wet mesa formation process, are sufficient to be applied to the manufacturing of integrated circuits.
Archive | 2001
Seiji Yaegashi; Kenji Kotani; Masaki Yanagisawa; Hiroshi Yano
Japanese Journal of Applied Physics | 1999
Hiroyuki Odagawa; Kenji Kotani; Yasuo Cho; Kazuhiko Yamanouchi
Archive | 1998
Yasuo Cho; Kenji Kotani; Hiroyuki Odakawa; Kazuhiko Yamanouchi; 裕之 小田川; 謙司 小谷; 和彦 山之内; 康雄 長