Kenneth James Schultz

Fully-parallel 25 MHz 2.5 Mb CAM

In a fully-parallel CAM, all stored bits are compared to the search data in one clock cycle. In traditional implementations, the result of a word search is determined by a dynamic NOR of bit comparison results. This leads to two match line transitions per mismatched word per search and excessive power dissipation, since no more than one match is expected. If the dynamic NOR is replaced by a dynamic NAND, transitions occur only on matches, and power savings are realized.

Content-addressable memory core cells: a survey

The data stored in a content-addressable memory (CAM) are accessed based on their contents, rather than their location, and this functionality is useful in many applications, including databases, table look-up, and associative computing. The central building blocks of these memories are the core cells, and this paper surveys 14 such cells, primarily from a qualitative perspective. The cells date from 1970, and many innovations have been introduced since then, both in circuit design and fabrication technology. Among the cells described, 11 employ static storage and four use dynamic storage; 14 can be implemented in CMOS, while one requires BiCMOS technology. A discussion follows, highlighting significant design improvements, advocating particular cells for general-purpose use, and suggesting avenues for future research.