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Dive into the research topics where Kevin S. London is active.

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Featured researches published by Kevin S. London.


european pvm mpi users group meeting on recent advances in parallel virtual machine and message passing interface | 2001

Review of Performance Analysis Tools for MPI Parallel Programs

Shirley Moore; David Cronk; Kevin S. London; Jack J. Dongarra

In order to produce MPI applications that perform well on todays parallel architectures, programmers need effective tools for collecting and analyzing performance data. A variety of such tools, both commercial and research, are becoming available. This paper reviews and evaluations the available cross-platform MPI performance analysis tools.


international parallel and distributed processing symposium | 2003

Experiences and lessons learned with a portable interface to hardware performance counters

Jack J. Dongarra; Kevin S. London; Shirley Moore; Philip Mucci; Daniel Terpstra; Haihang You; Min Zhou

The PAPI project has defined and implemented a cross-platform interface to the hardware counters available on most modern microprocessors. The interface has gained widespread use and acceptance from hardware vendors, users, and tool developers. This paper reports on experiences with the community-based open-source effort to define the PAPI specification and implement it on a variety of platforms. Collaborations with tool developers who have incorporated support for PAPI are described. Issues related to interpretation and accuracy of hardware counter data and to the overheads of collecting this data are discussed. The paper concludes with implications for the design of the next version of PAPI.


2003 User Group Conference. Proceedings | 2003

PAPI deployment, evaluation, and extensions

Shirley Moore; Daniel Terpstra; Kevin S. London; Philip Mucci; Patricia J. Teller; Leonardo Salayandia; Alonso Bayona; Manuel Nieto

PAPI is a cross-platform interface to the hardware performance counters available on most modern microprocessors. These counters exist as a small set of registers that count events, which are occurrences of specific signals related to processor functions. Monitoring these events has a variety of uses in application development, including performance modeling and optimization, debugging, and benchmarking. In addition to routines for accessing the counters, PAPI specifies a common set of performance metrics considered most relevant to analyzing and tuning application performance. These metrics include cycle and instruction counts, cache and memory access statistics, and functional unit and pipeline status, as well as relevant SMP cache coherence events. PAPI is becoming a de facto industry standard and has been incorporated into several third-party research and commercial performance analysis tools. As in any physical system, the act of measuring perturbs the phenomenon being measured. Discrepancies in hardware counts and counter-related profiling data can result from other causes as well. A PET-sponsored project is deploying PAPI and related tools on DoD HPC Center platforms and evaluating and interpreting performance counter data on those platforms.


EuroPVM '96 Proceedings of the Third European PVM Conference on Parallel Virtual Machine | 1996

Taskers and General Resource Managers: PVM Supporting DCE Process Management

Graham E. Fagg; Kevin S. London; Jack J. Dongarra

We discuss the use of PVM as a system that supports General Process Management for DCEs. This system allows PVM to initialise MPI and other meta-computing systems. The impetus for such a system has come from the PVMPI project which required complex taskers and resource managers to be constructed. Such development is normally too time consuming for PVM users, due to the in-depth knowledge of PVMs internals, which are required to facilitate such systems correctly and reliably.


conference on high performance computing (supercomputing) | 2000

A Scalable Cross-Platform Infrastructure for Application Performance Tuning Using Hardware Counters

Shirley Browne; Jack J. Dongarra; Nathan Garner; Kevin S. London; Philip Mucci


Archive | 2004

Extending the MPI Specification for Process Fault Tolerance on High Performance Computing Systems

Graham E. Fagg; Edgar Gabriel; George Bosilca; Thara Angskun; Zhizhong Chen; Jelena Pješivac-Grbović; Kevin S. London; Jack J. Dongarra


iasted international conference on parallel and distributed computing and systems | 2001

End-user Tools for Application Performance Analysis Using Hardware Counters

Kevin S. London; Jack J. Dongarra; Shirley Moore; Philip Mucci; Keith Seymour; T. Spencer


Lecture Notes in Computer Science | 1998

MPL_Connect managing heterogeneous MPI applications interoperation and process control

Graham E. Fagg; Kevin S. London; Jack J. Dongarra


Department of Defense Users' Group Conference Proceedings | 2001

The PAPI Cross-Platform Interface to Hardware Performance Counters

Kevin S. London; Shirley Moore; Phil Mucci; Keith Seymour; Richard Luczak


european pvm mpi users group meeting on recent advances in parallel virtual machine and message passing interface | 1998

MPI_Connect Managing Heterogeneous MPI Applications Ineroperation and Process Control

Graham E. Fagg; Kevin S. London; Jack J. Dongarra

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Shirley Moore

University of Texas at El Paso

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Philip Mucci

University of Tennessee

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Alonso Bayona

University of Texas at El Paso

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David Cronk

University of Tennessee

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