Kidong Kim

An effective method for approximating the euclidean distance in high-dimensional space

It is crucial to compute the Euclidean distance between two vectors efficiently in high-dimensional space for multimedia information retrieval. We propose an effective method for approximating the Euclidean distance between two high-dimensional vectors. For this approximation, a previous method, which simply employs norms of two vectors, has been proposed. This method, however, ignores the angle between two vectors in approximation, and thus suffers from large approximation errors. Our method introduces an additional vector called a reference vector for estimating the angle between the two vectors, and approximates the Euclidean distance accurately by using the estimated angle. This makes the approximation errors reduced significantly compared with the previous method. Also, we formally prove that the value approximated by our method is always smaller than the actual Euclidean distance. This implies that our method does not incur any false dismissal in multimedia information retrieval. Finally, we verify the superiority of the proposed method via performance evaluation with extensive experiments.

Two-Dimensional Quantum-Mechanical Modeling and Simulation of Strained-Si Fin Field Effect Transistor (FinFET) on SiGe-On-Insulator

A strained-Si fin field effect transistor (SSFinFET) on SiGe-on-insulator is modeled and using two-dimensional Schrodinger and Poisson equations quantum-mechanically simulated in a self-consistent manner. The quantum electron concentration in an SS fin is then obtained using a two-dimensional Schrodinger equation. The field-dependent mobility in SS fin is calculated using the doping-dependent mobility which considered strain and velocity overshoot effects. These effects give rise to an enhancement in the drain current of SSFinFET by up to 25% compared with the conventional FinFET using relaxed Si-on-insulator (RSFinFET). For the gate length 1.5 times longer than fin width, the drain induced barrier lowering (DIBL) and subthreshold swing are below 0.1 V/V and 60 mV/dec, respectively, regardless of whether Si-fin experiences a strain. These results indicate that the ratio of gate length to fin width should be above approximately 1.5 to suppress short channel effects and DIBL in both SSFinFET and RSFinFET.