Kiichi Sakamoto

Electron Beam Block Exposure

A new exposure technique called block exposure was examined in order to increase the throughput of direct writing of memory LSI devices using an electron beam. With this technique, an electron beam is projected to a block of aperture patterns in the stencil mask to change the beam shape. Frequently used LSI pattern components are defined as blocks to be reused during the exposure. Patterns that are rarely used are exposed by using a variable-shape beam. With the demagnification ratio of one percent, masks are easy to fabricate and very reliable. The patterns with a 0.13-µm minimum feature size are well projected on a single-layer resist. With block exposure, any shape can be accurately transferred irrespective of the pattern shape or size. The throughput of about ten 8-in wafers per hour is estimated for several pattern layers of a 64-Mbit dynamic random-access memory (DRAM).

Repetitive One-Tenth Micron Pattern Fabrication Using An EB Block Exposure System

Beam calibration techniques of an EB block exposure system (NOWEL 3) are developed to determine deflection and correction data to deflect beams through each mask pattern. After the calibration, the current densities in a deflection area differ less than 1.6% from the mean value. The exposure positioning errors are below 0.03 µ m in magnitude. The calibration results are used to expose a repetitive pattern of DRAM storage capacitors. The block mask has doughnut-type structures held by 2 µ m-wide bridges. Rectangular 0.45×0.85 µ m2 resist patterns with clear edges are resolved at 0.11 µ m intervals. Repetitive patterns in a logic LSIC are also exposed with the block exposure. We extract mask patterns from the cache memory and shift register regions. The number of exposure spots is decreased to about 1/5 of that used in conventional rectangular shaped beam methods. The stitching errors between the mask patterns are measured from the exposure results, which are less than 0.04 µ m.