Kim Schuttenberg

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Publication

Featured researches published by Kim Schuttenberg.

Archive | 2009

Method and apparatus for data-less bus query

Frank O'Bleness; Sujat Jamil; David E. Miner; Tom Hameenanttila; Jeffrey Kehl; Richard Bryant; Kim Schuttenberg

Archive | 2017

Managing aliasing in a virtually indexed physically tagged cache

Kim Schuttenberg; Richard Bryant; Sujat Jamil; Frank O'Bleness

Archive | 2013

Methods and systems for expanding preload capabilities of a memory to encompass a register file

Kim Schuttenberg

Archive | 2012

Systems and methods for writing data from a caching agent to main memory according to a pre-clean criterion

Kim Schuttenberg; R. Frank O'Bleness

Archive | 2012

Systems and methods for reducing interrupt latency

Kim Schuttenberg; Sujat Jamil; R. Frank O'Bleness

Archive | 2017

PROXY IDENTIFIER FOR DATA ACCESS OPERATION

Richard Bryant; Kim Schuttenberg; Lilian Atieno Hutchins; Thomas Edward Roberts; Alex James Waugh; Max John Batley

Archive | 2016

Dynamically controlling clocking rate of a processor based on user defined rule

Kim Schuttenberg

Archive | 2016

System and method for writing data to a data storage structure

Kim Schuttenberg

Archive | 2015

System and method for informing hardware to limit writing in a memory hierarchy

Kim Schuttenberg; Richard Bryant

Archive | 2014

Integrated circuit and method for accessing segments of a cache line in arrays of storage elements of a folded cache

Kim Schuttenberg; Richard Bryant

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Collaboration

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Sujat Jamil

Intel

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David E. Miner

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R. Frank O'Bleness

Intel

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Marvell Technology Group

Archive Network Publication Hotspot Collaboration

Network

Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot

Dive into the research topics where Kim Schuttenberg is active.

Publication

Featured researches published by Kim Schuttenberg.

Method and apparatus for data-less bus query

Managing aliasing in a virtually indexed physically tagged cache

Methods and systems for expanding preload capabilities of a memory to encompass a register file

Systems and methods for writing data from a caching agent to main memory according to a pre-clean criterion

Systems and methods for reducing interrupt latency

PROXY IDENTIFIER FOR DATA ACCESS OPERATION

Dynamically controlling clocking rate of a processor based on user defined rule

System and method for writing data to a data storage structure

System and method for informing hardware to limit writing in a memory hierarchy

Integrated circuit and method for accessing segments of a cache line in arrays of storage elements of a folded cache

Collaboration

Dive into the Kim Schuttenberg's collaboration.