Kimmo Kaija

Inkjet printed System-in-Package design and manufacturing

Additive manufacturing technology using inkjet offers several improvements to electronics manufacturing compared to current non-additive masking technologies. Manufacturing processes can be made more efficient, straightforward and flexible compared to subtractive masking processes, several time-consuming and expensive steps can be omitted. Due to the additive process, material loss is minimal, because material is never removed as with etching processes. The amounts of used material and waste are smaller, which is advantageous in both productivity and environmental means. Furthermore, the additive inkjet manufacturing process is flexible allowing fast prototyping, easy design changes and personalization of products. Additive inkjet processing offers new possibilities to electronics integration, by enabling direct writing on various surfaces, and component interconnection without a specific substrate. The design and manufacturing of inkjet printed modules differs notably from the traditional way to manufacture electronics. In this study a multilayer inkjet interconnection process to integrate functional systems was demonstrated, and the issues regarding the design and manufacturing were considered.

System design issues for 3D system-in-package (SiP)

Development in electronics is driven by device and market needs. This paper focuses on system design issues for three-dimensional packaging technology and discusses interconnection density, material compatibility, thermal management, electrical requirements, related to delay and noise. Microelectronics packaging has to provide all future devices, such as electronics, actuators, sensors, antennas, optical/photonic, MEMS, and biological solutions. However, a 3D package is a cost effective solution to save placement and routing area on board using several IC processes in the same module. System-in-package (SiP) can combine all the electronic requirements of a functional system or a subsystem in one package. The driving force is integration without compromising individual chip technologies. In this work, a stacked system-in-package structure has been studied. The thermo-mechanical behavior of packages has been analyzed by finite element analysis (FEA) and the correlation between the experimental test results and the modeling was analyzed. A stacked 3D package can contain multiple heat sources that produce high power density. Therefore, thermal management needs extra attention to ensure safe operating temperatures under all conditions. The thermal behavior of the package was modeled using FEA and a boundary condition independent (BCI) compact thermal model (CTM) was built based on simulation results. In addition, high-speed signal and interfering environment set quite stringent requirements for 3D devices. Crosstalk between vertical connections was simulated and measured. Measurements of S-parameters were done using a network analyzer. The frequency range was 45 MHz to 20 GHz.

Evaluation of Inkjet Technology for Electronic Packaging and System Integration

The main trend of the electronic packaging industry has been on increasing the packaging density and increasing the functionality, but now also the interest on flexible manufacturing has grown. In this paper, we discuss the utilization of the inkjet technology for the electronic packaging and system integration. Inkjet technology provides fully-additive non-contacting deposition method that is suitable for flexible production. In this paper, we demonstrate the capability of the inkjet technology for the printable electronics through a highly-integrated RF SiP application, which is manufactured partly by inkjet printing. The SiP contains discrete components and an ASIC with a minimum pitch of 136 mum and the size of pads is 65 mum. The width of lines/spaces is designed with a rule of 75 mum/75 mum, but also narrower lines can be printed. The width of lines depends on the properties of surface, ink, and drop volume. The properties of the surface can be manipulated with proper surface treatment. In this paper, almost 20% decrease in a diameter of drop is reported when the surface treatment is used.

Capability of inkjet technology in electronics manufacturing

The past decade has seen a growing interest in additive manufacturing and printable electronics. The main markets are expected to be among low-cost mass production of radiofrequency identification (RFID) tags, antennas, keyboards, displays, sensors, and smart packages, but also high-performance products. This paper focuses on process improvement and capability analysis of inkjet technology in electronics manufacturing using six sigma methodology. It provides not only tools and roadmaps for technical development and process improvement, but also a systematic program management tools for technology development also in industrial-academic collaboration. This paper focuses on the printing accuracy and quality issues in inkjet printing technology. The scaling of the image and the alignment capability of the process is analyzed by printing several dot matrixes on polyimide substrates and measuring the places of the inkjetted drops from substrates and comparing those onto the locations of the dots in printfile. This data is used to generate a mathematical model, which was used to correct the shifting and scaling of the image yielding to improved process capability.

Analysis of mechanical performance of silver inkjet-printed structures

We report the mechanical performance of the structure of sintered silver ink used in inkjet printing, having a particle size of 3-7 nm. Tensile adhesion pull-off testing together with the optimized related ISO and ASTM industrial standards were used. Adhesion testing of samples was performed at room temperature and in 50% relative humidity. Sintered silver ink adhesion patterns were inkjet-printed onto several substrates, i.e. PEN (Polyethylene Naphthalate), PI (Polyimide), and LCP (Liquid Crystal Polymer). To control the ink spreading surface treatment material was used and its effect on adhesion performance was investigated. To determine the effect of various sintering processes on adhesion performance, two different sintering procedures, at 250degC for 30 minutes and at 220degC for 60 minutes, were used. After the results from the initial adhesion tests had been recorded, new adhesion test samples were prepared and placed in the humidity chamber to subject them to moisture, during which the JEDEC Standard JESD22-A101-B Steady State Temperature Humidity Bias Life Test was used with a temperature of 85degC in 85% relative humidity. After this soaking, the mechanical performance of the test samples was investigated by adhesion pull-off testing and the findings noted. In addition, the test samples were subjected to tension tests using a DMA (Dynamic Mechanical Analysis) device in order to analyze the effect of the dynamic mechanical stress on them. The DMA tension tests were performed at a temperature continuously increasing from -60degC to 100degC. This testing was done on various inkjet-printed silver patterns. In this paper, the results of adhesion pull-off and of DMA testing are presented separately and the effect of each parameter on the mechanical performance of the inkjet-printed silver patterns is discussed.

The effect of conductor thickness in passive inkjet printed RFID tags

This paper investigates the effects of conductor thickness on the performance of passive RFID tags fabricated using inkjet technology. Judging from the obtained results the performance of printed tags continues to increase as more conductive layers are added. However, the results show that the amount of performance improvement reduces with increase of the number of layers.

Molded Substrates for Inkjet Printed Modules

Ever increasing demand for high-performance, miniaturized, low-cost, and more environmentally conscious targets set high requirements for electronics packaging and manufacturing. Digital drop-on-demand printing of materials is an interesting approach for electronics manufacturing allowing several advantages compared to subtractive methods to manufacture electronics. Additive processing by means of digital printing offers new possibilities to electronics integration, by enabling direct writing on even nonplanar surfaces, and interconnection without specific substrate for components. A module utilizing additive deposition of conductive metallic nanoparticle inks and dielectrics using inkjet printing was designed. Conventional laminate-based or ceramic interconnection substrate, i.e., printed wiring boards was not used as often in electronics modules. Chip-first modules made using a particular encapsulation method were constructed of molded substrate with embedded components and without any wiring. The molding process and the characteristics of molding material were examined using real product samples, material characterization methods, and modeling. The interconnection process using inkjettable metallic nanoparticle and dielectric inks set strict requirements for molding materials; the surface characteristics should be suitable for the inkjetting of conductive and dielectric materials. Additionally, material must withstand the harsh process conditions that include several heating cycles in relatively high temperatures for organic materials. The surface characteristics of the molding material should be adjusted to ensure good control of inkjetted fluids on a surface enabling high-yield inkjetting of fine-pitch patterns. Furthermore, the mechanical properties of molding material and molding material surface have an effect on the interconnection process yield and reliability of the inkjetted lines and interconnections. The characteristics of molded modules working as substrate for additively processed patterns is a crucial role in the manufacturing of a highly integrated printed module.

Functional fluid jetting performance optimization

Abstract The manufacturing method utilizing digital printing technology offers alternatives to create electronic structures to be used even in microelectronic applications. Material deposition based on digital inkjet technology offers advantages over both traditional mask-etch technologies and other printing methods. Inkjet technology works in an additive manner, reducing material consumption and the amount of created waste. Additionally, the digital nature of the process allows flexible production, e.g., rapid design changes, quick prototyping, and small, customized series. This research paper introduces ink jetting performance optimization utilized in a concept where discrete components and bare silicon chips were integrated in a single module with ink jetted interconnections. Jetting optimization of fluids enhances the droplet placement and volume accuracy that is a critical issue when forming interconnections for dense IC circuits. The overall drop placement error in jet printing is a combination of several error sources such as mechanical, dynamical and material related issues. However, the largest error portion is induced by a single printhead. The printhead related errors can be detected by observing the flight behavior after firing from the printhead nozzle. This paper focuses on optimizing the performance of ejected droplets during flight, i.e., drop formation sequence and minimum flight time variance. The average drop velocities of drops fired from separate printhead nozzles can be used to evaluate the difference in placement on substrate, which in worse case may lead to electrical wiring failures. The performance optimization was done by analyzing the initial state, modeling the drop velocity during flight, optimizing the process parameters to satisfy the model, and accepting the model after verification. Two inks, conductive and dielectric, were evaluated and improvement in placement accuracy was achieved through enhanced uniformity in drop average velocities, a dimensionless number, coefficient of variation was enhanced from 0.051 to 0.040,with conductive ink and from 0.111 to 0.049 with dielectric ink, thus decreasing the velocity related drop placement error.

Transient Thermal Characterization of a Stacked Multichip Package

This paper is a case study of the thermal behavior of a stacked multichip package (SMCP). The aim is to measure temperature responses when heat is dissipated on different dice and to characterize the behavior with a compact thermal model (CTM) that accurately models steady-state and transient responses with a simple thermal RC -network. The measured package consists of three stacked layers, where each layer has one thinned flip chip attached die on an aramid interposer. The packages thermal responses were measured with thermal test dice that contain heaters and temperature sensors. The package was modeled with a finite element method (FEM) and the simulated temperature responses showed reasonable agreement with measured data. The FE model was further used to provide reference thermal data under different boundary conditions for CTM synthesis. The obtained CTM models accurately the steady-state and transient behavior and can be used as simplified model of the measured SMCP for further thermal analysis.

Modeling Thermal Behavior of System-in-Package with Dynamic Compact Model

Integrating more functionality into smaller size increases the heat dissipation density and emphasizes the need for thermal simulations and accurate thermal models. With a compact thermal model (CTM) the dynamic and steady state thermal behavior of a package with several heat dissipating dice can be modeled. The optimization of the models parameters requires a properly defined cost function. In this paper a two-phase optimization routine was used to find simultaneously good capacitance and resistance values. The accuracy of the model was improved when effective surface areas defined the convections of a CTM. Parameter optimization in time domain, for variable thermal load and nonlinear system, was tested and found accurate, but time consuming.