Kiyoshi Igarashi

43.2: Driving of PDPs with 208 Sub-Fields Using a Grouped Address-While-Display Scheme

Driving of AC-PDPs with as many as 208 sub-fields has been realized by using a grouped Address-While-Display (AWD) scheme, which combines the AWD and low-voltage-addressing techniques. The drive scheme provides high picture quality with a wide choice of gamma characteristics. Also, dynamic false contours can be eliminated.

Reduction of Data Pulse Voltage to 20V by Using Address-while-Display Scheme for AC-PDPs

Data pulse voltage for the 3-electrode, surface-discharge AC-PDP is reduced to less than 20V by using Address-while-Display scheme which is capable of attaining 96% light-emission duty. Metastable atoms created in each sub-field play the key role to the voltage reduction.

P‐46: A 16‐Bit Drive of 1080p PDPs for High Quality Image Expression

In order to express high quality images with a satisfactory gray scale expression at low luminance levels and also with negligible artifacts on PDPs, a 16-bit (16 sub-field) capability is required. This is realized for 1080p HDTV expression on a double-scanned 3-electrode AC-PDP by improving the voltage waveforms of the Address-While-Display drive scheme. Light-emission duty factor was 94%.

Reducing the Number of Scan Drivers in AC‐PDPs by an Order of Magnitude Using Gas Discharge AND Logic

A new driving technique is introduced with which the number of scan drivers for the conventional 3-electrode surface-discharge AC-PDPs can be reduced by more than an order of magnitude. The technique utilizes the gas discharge AND logic, with which an address speed for HDTV expression can be attained.

Data-pulse-voltage reduction of AC-PDPs by using metastable-particle priming

It is shown that space charges dominate the build-up of an address discharge when it is preceded by a priming discharge in less than 32 μsec. When the separation of these discharges (cease period) exceeds 32 μsec, the space charges diffuse away and the metastable particles start playing the role of priming. The priming effect of the metastable particles is not too strong, which is desirable for adopting a data-pulse-voltage reduction technique for PDPs. By choosing the length of the cease period to be between 32 and 80 μsec in the Address-While-Display drive scheme, the data pulse voltage was reduced to 20 V. This leads to a considerable cost reduction of data driver ICs.

Address‐While‐Display technique combined with gas‐discharge AND logic for driving AC‐PDPs

— A hybrid AWD/AND drive technique has been developed in which an Address-While-Display (AWD) scheme is combined with an AND logic characteristic that gas discharges demonstrate. The AWD technique enables AC-PDPs to be driven at high luminance, while the AND logic reduces the number of scan drivers by an order of magnitude. A detailed analysis of the addressing operation has been made. The hybrid drive utilizes the AND logic in two ways: (1) a combination of two voltage pulses and (2) a combination of a voltage pulse and discharge-priming particles. It was found that the addressing operation requires the establishment of a discharge between the scan and data electrodes, and also between the scan and display electrodes.